AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD9548/PCBZ
Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet
1.AD9548BCPZ-REEL7.pdf
(112 pages)
Specifications of AD9548/PCBZ
Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Parameter
1
2
3
4
5
f
f
f
f
f
REF
DDS
LOOP
SYSCLK
S
f
is the sample rate of the output DAC.
REF
is the frequency of the active reference.
is the output frequency of the DDS.
Bandwidth: 100 Hz to 100 MHz
Bandwidth: 5 kHz to 20 MHz
Bandwidth: 20 kHz to 80 MHz
Bandwidth: 50 kHz to 80 MHz
Bandwidth: 4 MHz to 80 MHz
is the DPLL digital loop filter bandwidth.
is the frequency at the SYSCLKP and SYSCLKN pins.
= 19.44 Hz
1
; f
DDS
= 311.04 MHz
2
; f
LOOP
= 1 kHz
3
Min
Rev. A | Page 13 of 112
Typ
0.67
0.31
0.33
0.33
0.16
Max
Unit
ps rms
ps rms
ps rms
ps rms
ps rms
Test Conditions/Comments
f
f
PLL charge pump current; results valid for
LVPECL, LVDS, and CMOS output logic types
Random jitter
Random jitter
Random jitter
Random jitter
Random jitter
SYSCLK
S
= 1 GHz
= 50 MHz
5
; Q-divider = 1; default SYSCLK
4
crystal;
AD9548
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