AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 50
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AD9548/PCBZ
Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet
1.AD9548BCPZ-REEL7.pdf
(112 pages)
Specifications of AD9548/PCBZ
Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9548
Table 27 lists a sample EEPROM download instruction sequence.
It illustrates the use of condition instructions and how they alter
the download sequence. The table begins with the assumption
that no conditions are in effect. That is, the most recently executed
condition instruction is B0 or no conditional instructions have
been processed.
Table 27. EEPROM Conditional Processing Example
Instruction
0x08
0x01
0x00
0xB1
0x19
0x04
0x00
0xB2
0xB3
0x07
0x05
0x00
0x0A
0xB0
0x80
0x0A
Storing Multiple Device Setups in EEPROM
Conditional processing makes it possible to create a number of
different device setups, store them in EEPROM, and download
a specific setup on demand. To do so, first program the device
control registers for a specific setup. Then, store an upload
sequence in the EEPROM scratch pad with the following
general form:
1.
2.
3.
With the upload sequence written to the scratch pad, perform
an EEPROM upload (Register 0E02, Bit 0).
Condition instruction (B1 to CF) to identify the setup with
a specific condition (1 to 31)
Data instructions (to save the register contents) along with
any required calibrate and/or I/O update instructions
Pause instruction (FE)
Action
Transfer the system clock register contents
regardless of the current condition.
Tag Condition 1
Transfer the clock distribution register contents
only if condition = 1
Tag Condition 2
Tag Condition 3
Transfer the reference input register contents only
if condition = 1, 2, or 3
Calibrate the system clock only if condition = 1, 2,
or 3
Clear the condition tag board
Execute an I/O update regardless of the value of
the condition
Calibrate the system clock regardless of the value
of the condition
Rev. A | Page 50 of 112
Reprogram the device control registers for the next desired
setup. Then store a new upload sequence in the EEPROM
scratch pad with the following general form:
1.
2.
3.
4.
With the upload sequence written to the scratch pad, perform
an EEPROM upload (Register 0E02, Bit 0).
Repeat the process of programming the device control registers
for a new setup, storing a new upload sequence in the EEPROM
scratch pad (Step 1 through Step 4), and executing an EEPROM
upload (Register 0E02, Bit 0) until all of the desired setups have
been uploaded to the EEPROM.
Note that, on the final upload sequence stored in the scratch
pad, the pause instruction (FE) must be replaced with an end
instruction (FF).
To download a specific setup on demand, first store the
condition associated with the desired setup in Register 0E01,
Bits[4:0]. Then perform an EEPROM download (Register 0E03,
Bit 1). Alternatively, to download a specific setup at power-up,
apply the required logic levels necessary to encode the desired
condition on the M3 to M7 multifunction pins. Then power up
the device; an automatic EEPROM download occurs. The
condition (as established by the M3 to M7 multifunction pins)
guides the download sequence and results in a specific setup.
Keep in mind that the number of setups that can be stored
in the EEPROM is limited. The EEPROM can hold a total of
2048 bytes. Each nondata instruction requires one byte of
storage. Each data instruction, however, requires N + 4 bytes of
storage, where N is the number of transferred register bytes and
the other four bytes include the data instruction itself (one
byte), the target address (two bytes), and the checksum
calculated by the EEPROM controller during the upload
sequence (one byte).
Condition instruction (B0)
The next desired condition instruction (B1 to CF, but
different than the one used during the previous upload to
identify a new setup)
Data instructions (to save the register contents) along with
any required calibrate and/or I/O update instructions
Pause instruction (FE)