EVAL-ADXL346Z Analog Devices Inc, EVAL-ADXL346Z Datasheet - Page 18

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EVAL-ADXL346Z

Manufacturer Part Number
EVAL-ADXL346Z
Description
Inertial Sensor Evaluation System
Manufacturer
Analog Devices Inc
Datasheets

Specifications of EVAL-ADXL346Z

Silicon Manufacturer
Analog Devices
Silicon Core Number
ADXL346
Kit Application Type
Sensing - Motion / Vibration / Shock
Application Sub Type
Accelerometer
Silicon Family Name
IMEMS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADXL346
Table 12. I
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
C
1
2
3
4
5
6
7
SCL
1
2
3
4
5
6
7
8
9
10
11
the falling edge of SCL.
Limits are based on characterization results, with f
All values referred to the V
t
A transmitting device must internally provide an output hold time of at least 300 ns for the SDA signal (with respect to V
The maximum t
The maximum value for t
C
B
3, 4, 5, 6
6
7
B
is the data hold time that is measured from the falling edge of SCL. It applies to data in transmission and acknowledge.
SDA
SCL
is the total capacitance of one bus line in picofarads.
2
C Timing (T
6
value must be met only if the device does not stretch the low period (t
t
9
6
is a function of the clock low time (t
CONDITION
IH
START
and the V
A
Min
2.5
0.6
1.3
0.6
100
0
0.6
0.6
1.3
0
20 + 0.1 C
t
4
= 25°C, V
IL
levels given in Table 11.
t
3
B
Limit
7
S
= 2.6 V, V
1, 2
Max
400
0.9
300
250
300
400
SCL
t
= 400 kHz and a 3 mA sink current; not production tested.
10
t
6
DD I/O
3
), the clock rise time (t
= 1.8 V)
Unit
kHz
μs
μs
μs
μs
ns
μs
μs
μs
μs
ns
ns
ns
ns
ns
pF
Figure 41. I
t
2
Rev. A | Page 18 of 40
2
10
C Timing Diagram
), and the minimum data setup time (t
t
Description
SCL clock frequency
SCL cycle time
t
t
t
t
t
t
t
t
t
t
t
t
t
Capacitive load for each bus line
11
HIGH
LOW
HD, STA
SU, DAT
HD, DAT
SU, STA
SU, STO
BUF
R
R
F
F
F
, rise time of both SCL and SDA when receiving
, rise time of both SCL and SDA when receiving or transmitting
, fall time of SDA when receiving
, fall time of both SCL and SDA when transmitting
, fall time of both SCL and SDA when transmitting or receiving
, bus-free time between a stop condition and a start condition
t
, SCL low time
, SCL high time
5
, setup time for repeated start
3
, start/repeated start condition hold time
, data setup time
, stop condition setup time
, data hold time
) of the SCL signal.
CONDITION
REPEATED
START
t
7
IH,min
t
4
5(min)
of the SCL signal) to bridge the undefined region of
). This value is calculated as t
t
1
6(max)
CONDITION
= t
STOP
t
3
8
− t
10
− t
5(min)
.

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