MAX6968AUE Maxim Integrated Products, MAX6968AUE Datasheet - Page 8
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MAX6968AUE
Manufacturer Part Number
MAX6968AUE
Description
LED Drivers 8-Port, 5.5V LED Dri ver, 8-Segment Any d
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6968APE.pdf
(13 pages)
Specifications of MAX6968AUE
Number Of Segments
16
Low Level Output Current
60000 uA
Operating Supply Voltage
3 V to 5.5 V
Maximum Supply Current
25000 uA
Maximum Power Dissipation
1702 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP EP
Minimum Operating Temperature
- 40 C
8-Port, 5.5V Constant-Current LED Driver
Figure 3. LE and CLK to OUT_ Timing
Table 1. 4-Wire Serial-Interface Truth Table
L = Low-logic level
H = High-logic level
X = Don’t care
P = Present state
R = Previous state
8
SERIAL
INPUT
OUT_
DATA
LE
OUT_
LE
CLK
OUT_
CLK
OUT_
DIN
—
—
—
H
X
L
_______________________________________________________________________________________
CLOCK
INPUT
CLK
—
—
—
D
R
P
—
H
X
L
0
0
1
SHIFT-REGISTER
t
D
R
R
R
P
—
t
t
LRF
LRR
X
CRF
t
CRR
1
1
1
2
1
CONTENTS
D
R
R
R
P
—
X
2
2
2
2
3
… D
… R
… R
… R
…
… P
—
—
n-1
n-1
n-2
n-2
n-1
X
R
R
D
R
P
—
n-1
n-1
X
n
n
n
INPUT
LOAD
LE
—
—
—
—
H
L
D
R
P
—
—
—
X
0
0
0
LATCH CONTENTS
D
R
P
—
—
—
X
1
1
1
CLK is the serial-clock input, which shifts data at DIN
into the MAX6968 8-bit shift register on its rising edge.
LE is the load input of the MAX6968 latch that transfers
data from the MAX6968 8-bit shift register to its 8-bit
latch when LE is high (transparent latch), and latches
the data on the LE’s falling edge of LE (Figure 2).
The fourth input provides output-enable control of the
output drivers. OE is high to force outputs OUT0–OUT7
high impedance, without altering the contents of the
output latches, and low to enable outputs OUT0–OUT7
to follow the state of the output latches.
OE is independent of the operation of the serial inter-
face. Data can be shifted into the serial-interface shift
register and latched, regardless of the state of OE.
DOUT is the serial-data output, which shifts data out
from the MAX6968’s 8-bit shift register on the rising edge
of CLK. Data at DIN is propagated through the shift reg-
ister and appears at DOUT eight clock cycles later.
D
R
—
—
—
P
X
2
2
2
… D
—
—
—
— R
… P
…
—
—
—
n-1
n-1
n-1
X
D
R
—
—
—
P
X
n
n
n
BLANKING
INPUT
OE
—
—
—
—
H
L
Hi-Z Hi-Z Hi-Z … Hi-Z Hi-Z
D
—
—
—
—
P
0
0
OUTPUT CONTENTS
D
P
—
—
—
—
1
1
D
P
—
—
—
—
2
2
… D
—
—
—
—
… P
—
—
—
—
n-1
n-1
D
P
—
—
—
—
n
n