DS8005-KIT# Maxim Integrated Products, DS8005-KIT# Datasheet - Page 12
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DS8005-KIT#
Manufacturer Part Number
DS8005-KIT#
Description
Power Management Modules & Development Tools DS8005 EVAL KIT DS8005 EVAL KIT
Manufacturer
Maxim Integrated Products
Datasheet
1.DS8005-RRX.pdf
(20 pages)
Specifications of DS8005-KIT#
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Smart Card Interface
4) V
5) I/O_ pin is enabled (t
6) The CLK_ signal is applied to the C3 contact (t
7) RST_ is enabled (t
To apply the clock to the card interface:
1) Set RSTIN high.
2) Set CMDVCC low.
3) Set RSTIN low between t
4) RST_ stays low until t
5) RSTIN has no further effect on CLK_ after t
If the applied clock is not needed, set CMDVCC low
with RSTIN low. In this case, CLK_ starts at t
200ns after the transition on I/O; see Figure 4); after t
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform acti-
vation with RSTIN held permanently high.
When the activation sequence is completed, the card
interface is in active mode. The host microcontroller
and the smart card exchange data on the I/O lines.
When a session is completed, the host microcontroller
sets the CMDVCC line high to execute an automatic
deactivation sequence and returns the card interface to
the inactive mode (Figure 5).
1) RST_ goes low (t
2) CLK_ is held low (t
3) I/O_ pin is pulled low (t
4) V
5) When V
6) All card contacts become low impedance to GND;
7) The internal oscillator returns to its lower frequency.
Each V
80mA continuously at 5V, 65mA at 3V, and 30mA at
12
slope (t
oscillator period (approximately 25µs).
ously pulled low).
of RSTIN.
times the period of the internal oscillator (approxi-
mately 25µs).
tion sequence is complete (at t
I/OIN remains at V
resistor).
CC_
CC
______________________________________________________________________________________
CC_
starts to fall (t
rises from 0 to 5V, 3V, or 1.8V with a controlled
2
CC_
generator has a capacity to supply up to
= t
reaches its inactive state, the deactiva-
1
+ 1.5 × T). T is 64 times the internal
Deactivation Sequence
10
5
14
).
12
DD
= t
= t
5
13
3
= t
1
, then RST becomes the copy
3
(pulled up through an 11kΩ
10
= t
= t
+ 7T).
and t
10
+ 1.5 × T).
10
1
+ 0.5 × T) where T is 64
V
+ 4T) (they were previ-
5
+ T).
; CLK_ now starts.
CC
DE
Active Mode
).
Generator
3
5
(minimum
.
4
).
5
,
1.8V. An internal overload detector triggers at approxi-
mately 120mA. Current samples to the detector are fil-
tered. This allows spurious current pulses (with a
duration of a few µs) up to 200mA to be drawn without
causing deactivation. The average current must stay
below the specified maximum current value. To main-
tain V
ESR < 100mΩ) should be connected to CGND and
placed near the V
capacitor (220nF is the best choice) with the same ESR
should be connected to CGND and placed near the
smart card reader’s C1 contact.
The following fault conditions are monitored:
• Short-circuit or high current on V
• Removal of a card during a transaction
• V
• Card voltage generator operating out of the specified
• Overheating
There are two different cases (Figure 6):
• CMDVCC High Outside a Card Session. Output
• CMDVCC Low Within a Card Session. Output OFF_
The device has a debounce feature with an 8ms typical
duration (Figure 6). When a card is inserted, output
OFF_ goes high after the debounce time delay. When
the card is extracted, an automatic deactivation
sequence of the card is performed on the first true/false
transition on PRES_ and output OFF_ goes low.
values (V
high)
OFF_ is low if a card is not in the card reader and
high if a card is in the reader. The V
itored—a decrease in input voltage generates an
internal power-on reset pulse but does not affect the
OFF_ signal. Short-circuit and temperature detection
is disabled because the card is not powered up.
goes low when a fault condition is detected, and an
emergency deactivation is performed automatically
(Figure 7). When the system controller resets CMD-
VCC to high, it may sense the OFF_ level again after
completing the deactivation sequence. This distin-
guishes between a card extraction and a hardware
problem (OFF_ goes high again if a card is present).
Depending on the connector’s card-present switch
(normally closed or normally open) and the mechani-
cal characteristics of the switch, bouncing can occur
on the PRES_ signals at card insertion or withdrawal.
DD
CC
dropping
voltage accuracy, a 100nF capacitor (with an
DDA
too low or current consumption too
CC_
pin, and a 100nF or 220nF
Fault Detection
CC_
DD
supply is mon-