MAX1057EVKIT Maxim Integrated Products, MAX1057EVKIT Datasheet - Page 31
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MAX1057EVKIT
Manufacturer Part Number
MAX1057EVKIT
Description
Power Management Modules & Development Tools Programmers, Development Systems
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX1020BETX.pdf
(44 pages)
Specifications of MAX1057EVKIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Write the command byte 00000001 to indicate a GPIO
read operation. The eight SCLK cycles following the
command byte transfer the state of the GPIOs to DOUT
in the MAX1020. The 16 SCLK cycles following the com-
mand byte transfer the state of the GPIOs to DOUT in the
MAX1057/MAX1058. See Tables 18 and 19.
Table 17. GPIO-Mode Control
Table 18. MAX1020 GPIO Read
Table 19. MAX1057/MAX1058 GPIO Read
DIN
DOUT
DIN
DOUT
DATA PIN
DATA PIN
CONFIGURATION
BIT
1
1
0
0
10-Bit, Multichannel ADCs/DACs with FIFO,
0
0
0
0
GPIO COMMAND BYTE
0
0
0
0
GPIO COMMAND BYTE
______________________________________________________________________________________
0
0
0
0
WRITE
BIT
0
0
1
0
1
0
Temperature Sensing, and GPIO Ports
0
0
0
0
0
0
0
0
OUTPUT
Tri-state
STATE
0
0
0
0
1
0
0
1
0
0
0
X
0
1
0
GPIO Read
(open drain)
FUNCTION
X
0
Pulldown
Output
Output
X
0
GPIO
Input
X
0
DATA BYTE 1
X
0
X
0
X
0
X
Write a command byte 0001XXXX to the DAC select
register to indicate the word to follow is written to the
DAC serial interface, as detailed in Tables 1, 10, 20, and
21. Write the next 16 bits to the DAC interface register,
as shown in Tables 20 and 21. Following the high-to-low
transition of CS, the data is shifted synchronously and
latched into the input register on each falling edge of
SCLK. Each word is 16 bits. The first 4 bits are the con-
trol bits followed by 10 data bits (MSB first) and 2 don’t-
care sub-bits. See Figures 9–12 for DAC timing
specifications.
If CS goes high prior to completing 16 SCLK cycles, the
command is discarded. To initiate a new transfer, drive
CS low again.
For example, writing the DAC serial interface word 1111
0000 and 1111 0100 disconnects DAC outputs 4
through 7 and forces them to a high-impedance state.
DAC outputs 0 through 3 remain in their previous state.
X
0
X
GPIOC1
X
X
X
DATA BYTE
X
GPIOC0
X
X
X
DATA BYTE 2
X
GPIOA1
DAC Serial Interface
X
X
X
GPIOA0
X
X
X
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