STEVAL-ISV009V1 STMicroelectronics, STEVAL-ISV009V1 Datasheet - Page 33

• Manufacturer Part Number: STEVAL-ISV009V1
• Description: Power Management Modules & Development Tools DUAL STG DC/AC CNVRT DEMO BRD
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-ISV009V1

• Design Resources: STEVAL-ISV009V1 BOM STEVAL-ISV009V1 Schematic
• Main Purpose: DC/DC, Step Up
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 36V
• Current - Output: -
• Voltage - Input: -
• Regulator Topology: Boost
• Frequency - Switching: -
• Board Type: Fully Populated
• Utilized Ic / Part: SPV1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AN3392
13.4
13.5
13.6
Internal voltage rail capacitors
C7 is a tank capacitor used to guarantee the voltage level (5 V) of the internal regulated
voltage of the SPV1020.
Suggested value is 470 nF and it isn’t application dependant.
Same voltage range as for boost capacitors can be used. Maximum voltage must be higher
than 5 V.
Low-ESR capacitors are good choices to increase the whole system efficiency.
Input voltage capacitors
C5 is the input capacitance added at the input in order to reduce the voltage ripple.
Maximum voltage of this capacitor is strictly dependent by the input source (typically
between 25 V and 50 V).
Low-ESR capacitors are good choices to increase the whole system efficiency.
Suggested minimum input capacitance is 2 μF.
In order to reduce the ESR effect it is suggested to split input capacitance into 2 capacitors
placed in parallel.
Another capacitor (C11) is connected to the supply input pin of the SPV1020 (Vin). Its role is
to make as stable as possible the voltage on this pin that could be affected by the ripple of
the PV panel voltage.
According with the maximum current (Isc) provided by the PV panel connected at the input,
following formula can be used in order to select the proper capacitance value (Cin) for a
specified maximum input voltage ripple (Vin_rp_max):
Input voltage partitioning
Input voltage must be scaled to the reference voltage level (1.25V) of the ADC integrated in
the SPV1020.
R1 and R2 are the 2 resistors used for partitioning the input voltage.
Said V
according to the following rule:
Also, in order to optimize the efficiency of the whole system, when selecting R1 and R2,
their power dissipation has to be taken into account.
OC
voltage at open circuit of the PV panel, then R1 and R2 must be selected
Doc ID XXXXX Rev 1
Cin
≥
Vin
R
R
1
2
_
=
rp
. 1
Voc
25
_
Isc
max
−
1
∗
Fsw
External component selection
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