STEVAL-ISV009V1 STMicroelectronics, STEVAL-ISV009V1 Datasheet - Page 34
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STEVAL-ISV009V1
Manufacturer Part Number
STEVAL-ISV009V1
Description
Power Management Modules & Development Tools DUAL STG DC/AC CNVRT DEMO BRD
Manufacturer
STMicroelectronics
Series
-r
Datasheet
1.STEVAL-ISV009V1.pdf
(52 pages)
Specifications of STEVAL-ISV009V1
Design Resources
STEVAL-ISV009V1 BOM STEVAL-ISV009V1 Schematic
Main Purpose
DC/DC, Step Up
Outputs And Type
1, Non-Isolated
Power - Output
-
Voltage - Output
36V
Current - Output
-
Voltage - Input
-
Regulator Topology
Boost
Frequency - Switching
-
Board Type
Fully Populated
Utilized Ic / Part
SPV1020
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-ISV009V1
Manufacturer:
STMicroelectronics
Quantity:
1
External component selection
Note:
13.7
Note:
13.8
34/52
Assuming negligible the current flowing through pin Vin_sns, maximum power dissipation on
the series R1+R2 is:
As empiric rule, R1 and R2 should be selected according to:
In order to guarantee the proper functionality of pin V
R1+R2 should be in the range between 20 µA and 200 µA.
Input voltage sensing capacitor
C9 is placed in parallel to R2 and as close as possible to pin Vin_sns.
Its role is to make as stable as possible the voltage sensed by pin Vin_sns.
Critical parameters for capacitors are: capacitance, maximum voltage and ESR.
Maximum Voltage: if R1 and R2 have been chosen properly, so partitioning Vin to 1.25 V,
then maximum voltage of this capacitor can be in the range from 3.3 V or higher.
Capacitance value depends on the time constant (τ
C6*R1//R2) and by the system switching frequency (F
Assuming R1 >> R2 (so, R1//R2 ~= R2):
So,
Even if SPV1020 controls each phase at F
switching frequency (F
frequency (by default 400 kHz).
Output voltage capacitors
A minimum output capacitance must be added at the output, in order to reduce the voltage
ripple.
Critical parameters for capacitors are: capacitance, maximum voltage and ESR.
SSW
) must be assumed at 4 times the single phase switching
Doc ID XXXXX Rev 1
P
vin
_
C
s ns
P
9
vin
τ
<<
≅
in
_
10
1
≅
sns
%(
10
SW
∗
=
V
∗
Fssw
(by default 100 kHz) the whole system
in
R
(
Fssw
1
Voc
_
1
max
1
+
in
*
R
∗
)
) composed with R1+R2 (τ
in_sns
2
R
SSW
2
I
1
in
2
_
m ax
= 4*F
current flowing on the series
)
SW
).
in
=
AN3392