A4989SLDTR-T Allegro Microsystems Inc, A4989SLDTR-T Datasheet - Page 14
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A4989SLDTR-T
Manufacturer Part Number
A4989SLDTR-T
Description
DUAL FULL BRDG MOSFET DRVR W/MICROSTEP TRANS
Manufacturer
Allegro Microsystems Inc
Datasheet
1.A4989SLDTR-T.pdf
(17 pages)
Specifications of A4989SLDTR-T
Applications
Stepper Motor Controller, 2-Phase
Number Of Outputs
1
Voltage - Load
12 V ~ 50 V
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-TFSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
620-1389-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A4989SLDTR-T
Manufacturer:
CDE
Quantity:
10 000
Part Number:
A4989SLDTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
A4989
PFD1 and PFD2
select the portion of fast decay, according to table 2, to be used
when mixed decay is enabled. Mixed decay is enabled when a
STEP input signal commands an output current that is lower than
for the previous step. In mixed decay mode, as the trip point is
reached, the A4989 goes into fast decay mode until the specified
number of master oscillator cycles has completed. After this fast
decay portion, the A4989 switches to slow decay mode for the
remainder of the fixed off-time, t
Using PFD1 and PFD 2 to select 0% fast decay will effectively
maintain the full-bridge in slow decay at all times. This option
can be used to keep the phase current ripple to a minimum when
the motor is stationary or stepping at very low rates.
Selecting 100% fast decay will provide the fastest current control
when the current is falling and can help when the motor is being
driven at very high step rates.
SR
PWM off-cycle is triggered, load current recirculates according
to the decay mode selected by the control logic. The synchronous
rectification feature turns on the appropriate MOSFETs during
the current decay and effectively shorts out the body diodes with
Input used to set synchronous rectification mode. When a
The Percent Fast Decay pins are used to
OFF
.
Dual Full-Bridge MOSFET Driver
the low R
tion significantly and eliminates the need for additional Schottky
diodes. Synchronous rectification can be set to either active mode
or disabled mode.
Shutdown Operation
fault, or an undervoltage fault on VREG, the MOSFETs are
disabled until the fault condition is removed. At power-up, and
in the event of low voltage at VDD, the under voltage lockout
(UVLO) circuit disables the MOSFETs until the voltage at VDD
reaches the minimum level. Once V
level, the translator is reset to the home state, and the MOSFETs
are reenabled.
• Active Mode When the SR pin input is logic low, active mode
• Disabled Mode When the SR pin input is logic high, synchro-
is enabled and synchronous rectification will occur. This mode
prevents reversal of the load current by turning off synchro-
nous rectification when a zero current level is detected. This
prevents the motor winding from conducting in the reverse
direction.
nous rectification is disabled. This mode is typically used when
external diodes are required to transfer power dissipation from
the power MOSFETs to external, usually Schottky, diodes.
with Microstepping Translator
DS(ON)
of the MOSFET. This lowers power dissipa-
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
In the event of an overtemperature
DD
is above the minimum
14