AD5560JSVUZ-REEL Analog Devices Inc, AD5560JSVUZ-REEL Datasheet - Page 55
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AD5560JSVUZ-REEL
Manufacturer Part Number
AD5560JSVUZ-REEL
Description
1.2A Programmable DPS With DACs
Manufacturer
Analog Devices Inc
Type
Power Supplyr
Datasheet
1.AD5560JSVUZ-REEL.pdf
(60 pages)
Specifications of AD5560JSVUZ-REEL
Design Resources
Integrated Device Power Supply for PAD with Output Voltage Range 0 V to 25 V (CN0130)
Applications
Automatic Test Equipment
Mounting Type
Surface Mount
Package / Case
64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5560JSVUZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD5560JSVUZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
READBACK MODE
The AD5560 allows data readback via the serial interface from
every register directly accessible to the serial interface, which is
all registers except the DAC register (x2 calibrated register). To
read back contents of a register, it is necessary to write a 1 to
the R/ W bit, address the appropriate register, and fill the data
bits with all zeros.
After the write command has been written, data from the
selected register is loaded to the internal shift register and is
available on the SDO pin during the next SPI operation.
Address 0x43 and Address 0x44 are the only registers that are
read only. The read function gives the user details of the alarm
status and the comparator output result.
Alarm flags on latched alarm pins (Pin 1, Pin 2, Pin 3) and bits
are cleared after a read command of Register 0x44 (alarm status
and clear alarm register (see Table 25)).
SCLK frequency for readback does not operate at the full speed
of the SPI interface. See the Timing Characteristics section for
further details.
Rev. C | Page 55 of 60
DAC READBACK
The DAC x1, DAC m, and DAC c registers are available to read
back via the serial interface. Access to the calibrated x2 register
is not available.
POWER-ON DEFAULT
During power-on, the power-on state machine resets all internal
registers to their default values, and BUSY goes low. A rising
edge on BUSY indicates that the power-on event is complete
and that the interface is enabled. The RESET pin has no
function in the power-on event.
During power-on, all DAC x1 registers corresponding to 0 V
are cleared; the calibration register default corresponds to m at
full scale and to c at zero scale.
The default conditions of the DPS and the system control
registers are as shown in the relevant tables (see Table 17
through Table 26).
During a RESET function, all registers are reset to the power-on
default.
AD5560