AD621ARZ-RL Analog Devices Inc, AD621ARZ-RL Datasheet - Page 12

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AD621ARZ-RL

Manufacturer Part Number
AD621ARZ-RL
Description
IC,Instrumentation Amplifier,SINGLE,BIPOLAR,SOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD621ARZ-RL

Amplifier Type
Instrumentation
Number Of Circuits
1
Slew Rate
1.2 V/µs
-3db Bandwidth
800kHz
Current - Input Bias
500pA
Voltage - Input Offset
75µV
Current - Supply
900µA
Current - Output / Channel
18mA
Voltage - Supply, Single/dual (±)
±2.3 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD621
The AD621, as well as many other monolithic instrumentation
amplifiers, is based on the “three op amp” in amp circuit (Fig-
ure 7) amplifier. Since the input amplifiers (A1 and A2) have a
common-mode gain of unity and a differential gain equal to the
set gain of the overall in amp, the voltages V1 and V2 are defined
by the equations
The common-mode voltage will drive the outputs of amplifiers
A1 and A2 to the differential-signal voltage, multiplied by the
gain, spreads them apart. For a 10 V common-mode 0.1 V
differential input, V1 would be at 10.5 V and V2 at 9.5 V.
±
COMMON MODE GAIN = 1
DIFFERENTIAL GAIN = 10
4.44k
INPUT AMPLIFIER
+
+
V
V
20k
20k
A1
A2
V
10V–
1
2
INPUT A:
COM
INPUT B:
OFFSET
10V CM
= V
= V
+
V1
V2
1V
CM
CM
10k
10k
+ G × V
– G × V
+
+
COMMON MODE GAIN = 1/1000
V
V
DIFF
DIFF
0.5V
(1.25V + 1V)
DIFFERENTIAL GAIN = 1
OUTPUT AMPLIFIER
DIFF
+ V
DIFF
+
10k
10k
A3
OFFSET
/2
/2
USE THIS IN PLACE OF THE DAC FOR ZERO SUPPRESSION FUNCTION.
+
AD621
0 TO
REF
10
TO
10V
DAC
G = 10
AD548
V
C
OUT1
The AD621’s input amplifiers can provide output voltage within
2.5 V of the supplies. To avoid saturation of the input amplifier
the input voltage must therefore obey the equations:
Figure 8 shows the trade-off between common-mode and
differential-mode input for ± 15 V supplies and G = 10.
By cascading with use of the optional AD621, the circuit of
Figure 6 will provide ± 1 V of zero suppression at gains of 10
and 100 (at V
of ± 4 ppm/°C and ± 8 ppm/°C, respectively. Therefore, depend-
ing on the magnitude of the differential input signal, either
V
±
+
OUT1
OPTIONAL
or V
10k
10k
R
1.2
1.0
0.8
0.6
0.4
0.2
0
V
V
OUT2
0
CM
CM
OUT1
V
+
– G × V
+ G × V
AD621
OUT1
TO
may be used as the output.
2
10
and V
DIFF
DIFF
OUT2
4
/2 ≥ (Lower Supply + 2.5 V)
/2 ≤ (Upper Supply – 2.5 V)
V
TOTAL GAIN = 100
respectively) with maximum TCs
CM
6
V
OUT2
Volts
8
10
12

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