AD724JR-REEL7 Analog Devices Inc, AD724JR-REEL7 Datasheet
AD724JR-REEL7
Specifications of AD724JR-REEL7
Related parts for AD724JR-REEL7
AD724JR-REEL7 Summary of contents
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FEATURES Low Cost, Integrated Solution +5 V Operation Accepts FSC Clock or Crystal, or 4FSC Clock Composite Video and Separate Y/C (S-Video) Outputs Luma and Chroma Outputs Are Time Aligned Minimal External Components: No External Filters or Delay Lines ...
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AD724–SPECIFICATIONS Parameter SIGNAL INPUTS (RIN, GIN, BIN) Input Amplitude 1 Black Level 2 Input Resistance Input Capacitance LOGIC INPUTS (HSYNC, VSYNC, FIN, ENCD, STND, SELECT) CMOS Logic Levels Logic LO Input Voltage Logic HI Input Voltage Logic LO Input Current ...
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... Range Description AD724JR +70 C 16-Lead SOIC AD724JR-REEL +70 C 16-Lead SOIC AD724JR-REEL7 +70 C 16-Lead SOIC AD724-EB Evaluation Board CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD724 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...
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AD724 Pin Mnemonic Description 1 STND A Logical HIGH input selects NTSC encoding. A Logical LOW input selects PAL encoding. CMOS/TTL Logic Levels. 2 AGND Analog Ground Connection. 3 FIN FSC clock or parallel-resonant crystal, or 4FSC clock input. For ...
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TEKTRONIX COMPONENT WAVEFORM GENERATOR TEKTRONIX COMPOSITE WAVEFORM GENERATOR 1.0 APL = 49.8% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63 s 0.5 0.0 SYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : 1 2 –0 ...
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AD724 Figure 6. 100% Color Bars on Vector Scope, NTSC Figure 7. 100% Color Bars on Vector Scope, PAL 1.0 APL = 12.0% 525 LINE NTSC SLOW CLAMP TO 0.00V @ 6.63 s 0.5 0.0 SYNCHRONOUS –0 ...
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DG DP (NTSC) (SYNC = EXT) FIELD = 1 LINE = 27, 100 IRE RAMP DIFFERENTIAL GAIN (%) MIN = –0.53 0.00 –0.16 –0.49 –0.53 0.2 0.0 –0.2 –0.4 –0.6 –0.8 DIFFERENTIAL PHASE (deg) MIN = –1.14 0.00 –0.44 –1.14 ...
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AD724 THEORY OF OPERATION The AD724 was designed to have three allowable modes of applying a clock via the FIN pin. These are FSC (frequency of subcarrier) mode with CMOS clock applied, FSC mode using on-chip crystal oscillator, and 4FSC ...
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The filtered chrominance signal is then summed with the fil- tered luminance signal to create the composite video signal. The separate luminance, chrominance and composite video voltages are amplified by two in order to drive 75 lines. The separate luminance ...
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AD724 Both the analog and digital ground pins should be tied to the ground plane by a short, low inductance path. Each power supply pin should be bypassed to ground by a low inductance 0.1 F capacitor and a larger ...
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COMP V 24 REF FS DATA IN ADJ + ADV7120 AA 10k IOR SYNC MPEG IOG CLOCK DECODER BLANK IOB GND HSYNC VSYNC * PARALLEL–RESONANT CRYSTAL; 3.579545MHz (NTSC) OR 4.433620MHz ...
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AD724 NTSC Y2 PAL 10k 10k OPTIONAL CR1 CR2 IN4148 IN4148 U1 NOTES 3.579545MHz HC04 Figure 17. Crystal Selection Circuit Pin 1 (STND) of the AD724 is used to program the internal operation for either ...
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The VM700A has a special measurement mode that enables it to directly measure the frequency of one subcarrier in a video waveform with respect to an internally stored reference or a simultaneously supplied reference. The instrument gives a read- ing ...
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AD724 Flicker is a fundamental defect of all interlaced displays and is caused by the alternating field characteristic of the interlace technique. Consider a one pixel high black line that extends horizontally across a white screen. This line will exist ...
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REV. B OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead Wide Body SOIC (R-16) 0.4133 (10.50) 0.3977 (10.00 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65 0.3937 (10.00) PIN 1 0.1043 (2.65) 0.050 ...