AD9272BSVZRL-80 Analog Devices Inc, AD9272BSVZRL-80 Datasheet - Page 39
![12Bit 80 MSPS Octal ADC](/photos/6/60/66081/sv-100-3_sml.jpg)
AD9272BSVZRL-80
Manufacturer Part Number
AD9272BSVZRL-80
Description
12Bit 80 MSPS Octal ADC
Manufacturer
Analog Devices Inc
Type
Ultrasound Receiversr
Datasheet
1.AD9272BSVZ-80.pdf
(44 pages)
Specifications of AD9272BSVZRL-80
Design Resources
Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
Resolution (bits)
12 b
Sampling Rate (per Second)
80M
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.8V, 3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9272-65EBZ - BOARD EVAL AD9272
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9272BSVZRL-80
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Table 16. Serial Timing Definitions
Parameter
t
t
t
t
t
t
t
t
t
DS
DH
CLK
S
H
HI
LO
EN_SDIO
DIS_SDIO
SCLK
SDIO
CSB
1.800
1.795
1.790
1.785
1.780
1.775
1.770
1.765
1.760
1.755
1.750
1.745
1.740
1.735
1.730
1.725
1.720
1.715
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0
10
NUMBER OF SDIO PINS CONNECTED TOGETHER
t
20
S
Figure 68. SDIO Pin Loading
R/W
Minimum Timing (ns)
5
2
40
5
2
16
16
10
10
30
t
DS
W1
40
50
W0
t
DH
60
A12
70
A11
t
80
HI
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge (not shown in Figure 69)
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK
rising edge (not shown in Figure 69)
90
A10
Figure 69. Serial Timing Details
t
100
LO
A9
Rev. C | Page 39 of 44
t
CLK
A8
A7
This interface is flexible enough to be controlled by either serial
PROMS or PIC mirocontrollers. This provides the user with
an alternative method, other than a full SPI controller, for
programming the device (see the AN-812 Application Note).
D5
D4
D3
D2
D1
D0
t
H
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AD9272