AD9516-1BCPZ Analog Devices Inc, AD9516-1BCPZ Datasheet - Page 57
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AD9516-1BCPZ
Manufacturer Part Number
AD9516-1BCPZ
Description
IC,Fourteen Distributed-Output Clock Driver,LLCC,64PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9516-1BCPZ-REEL7.pdf
(80 pages)
Specifications of AD9516-1BCPZ
Pll
Yes
Input
Clock
Output
CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:14
Differential - Input:output
Yes/Yes
Frequency - Max
2.65GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.65GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9516-1/PCBZ - BOARD EVALUATION FOR AD9516-1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9516-1BCPZ
Manufacturer:
ADI
Quantity:
591
Part Number:
AD9516-1BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Reg.
Addr.
(Hex)
0x144
to
0x18F
LVPECL Channel Dividers
0x190
0x191
0x192
0x193
0x194
0x195
0x196
0x197
0x198
LVDS/CMOS Channel Dividers
0x199
0x19A
0x19B
0x19C
0x19D
0x19E
0x19F
0x1A0
0x1A1
0x1A2
0x1A3
0x1A4
to
0x1DF
VCO Divider and CLK Input
0x1E0
0x1E1
0x1E2
to
0x22A
Parameter
Divider 0
(PECL)
Divider 1
(PECL)
Divider 2
(PECL)
Divider 3
(LVDS/CMOS)
Divider 4
(LVDS/CMOS)
VCO divider
Input CLKs
Bit 7 (MSB)
Divider 0
bypass
Blank
Divider 1
bypass
Divider 2
bypass
Reserved
Reserved
Blank
Blank
Blank
Blank
Divider 2
no sync
Bit 6
Divider 0
no sync
Divider 1
no sync
Reserved
Phase Offset Divider 3.2
Phase Offset Divider 4.2
Low Cycles Divider 3.1
Low Cycles Divider 3.2
Low Cycles Divider 4.1
Low Cycles Divider 4.2
Divider 0 low cycles
Divider 1 low cycles
Divider 2 low cycles
Blank
Bit 5
Divider 0
force high
Divider 1
force high
Divider 2
force high
Bypass
Divider 3.2
Bypass
Divider 4.2
Rev. A | Page 57 of 80
Bit 4
Divider 0
start high
Divider 1
start high
Divider 2
start high
Bypass
Divider 3.1
Bypass
Divider 4.1
Power-
down
clock input
section
Reserved
Reserved
Reserved
Reserved
Blank
Blank
Blank
Bit 3
Divider 3
no sync
Divider 4
no sync
Reserved
Power-down
VCO clock
interface
Reserved
Reserved
Bit 2
Divider 3
force high
Divider 4
force high
Power-
down VCO
and CLK
Phase Offset Divider 3.1
Phase Offset Divider 4.1
High Cycles Divider 3.1
High Cycles Divider 3.2
High Cycles Divider 4.1
High Cycles Divider 4.2
Divider 0 phase offset
Divider 1 phase offset
Divider 2 phase offset
Divider 0 high cycles
Divider 1 high cycles
Divider 2 high cycles
Bit 1
Divider 0
direct to
output
Divider 1
direct to
output
Divider 2
direct to
output
Start High
Divider 3.2
Start High
Divider 4.2
Select
VCO or CLK
VCO Divider
Bit 0 (LSB)
Divider 0
DCCOFF
Divider 1
DCCOFF
Divider 2
DCCOFF
Start High
Divider 3.1
Divider 3
DCCOFF
Start High
Divider 4.1
Divider 4
DCCOFF
Bypass VCO
divider
AD9516-1
Default
Value
(Hex)
0x00
0x80
0x00
0xBB
0x00
0x00
0x00
0x00
0x00
0x22
0x00
0x11
0x00
0x00
0x22
0x00
0x11
0x00
0x00
0x02
0x00