ADE7758ARWZRL Analog Devices Inc, ADE7758ARWZRL Datasheet - Page 36
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ADE7758ARWZRL
Manufacturer Part Number
ADE7758ARWZRL
Description
IC,Power Metering,SOP,24PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7758ARWZ.pdf
(72 pages)
Specifications of ADE7758ARWZRL
Input Impedance
380 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
8mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Meter Type
3 Phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7758ARWZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADE7758
The frequency response of the LPF in the reactive power signal
path is identical to that of the LPF2 used in the average active
power calculation (see Figure 65).
VRMS × IRMS × sin(φ)
The low-pass filter is nonideal, so the reactive power signal has
some ripple. This ripple is sinusoidal and has a frequency equal
to 2× the line frequency. Because the ripple is sinusoidal
in nature, it is removed when the reactive power signal is
integrated over time to calculate the reactive energy.
The phase-shift filter has –90° phase shift when the integrator is
enabled and +90° phase shift when the integrator is disabled. In
addition, the filter has a nonunity magnitude response. Because
the phase-shift filter has a large attenuation at high frequency,
the reactive power is primarily for the calculation at line
frequency. The effect of harmonics is largely ignored in the
reactive power calculation. Note that because of the magnitude
characteristic of the phase shifting filter, the LSB weight of the
reactive power calculation is slightly different from that of the
active power calculation (see the Energy Registers Scaling
section). The ADE7758 uses the line frequency of the phase
selected in the FREQSEL[1:0] bits of the MMODE[1:0] to
compensate for attenuation of the reactive energy phase shift
filter over frequency (see the Period Measurement section).
Reactive Power Gain Calibration
The average reactive power from the LPF output in each phase
can be scaled by ±50% by writing to the phase’s VAR gain register
(AVARG, BVARG, or CVARG). The VAR gain registers are twos
complement, signed registers and have a resolution of 0.024%/LSB.
The function of the VAR gain registers is expressed by
Average
LPF
0x00000
2
Output
Reactive
Figure 71. Reactive Power Calculation
VOLTAGE
v(t) = 2 × VRMS × sin(ωt – θ)
×
INSTANTANEOUS
REACTIVE POWER SIGNAL
q(t) = VRMS × IRMS × sin(φ) + VRMS × IRMS × sin(2ωt + θ)
⎛
⎜
⎝
1
Power
+
VAR
=
Gain
2
θ
12
Re
AVERAGE REACTIVE POWER SIGNAL =
VRMS × IRMS × sin(θ)
gister
CURRENT
i(t) = 2 × IRMS × sin(ωt)
⎞
⎟
⎠
(32)
Rev. D | Page 36 of 72
The output is scaled by –50% by writing 0x800 to the VAR gain
registers and increased by +50% by writing 0x7FF to them.
These registers can be used to calibrate the reactive power (or
energy) calculation in the ADE7758 for each phase.
Reactive Power Offset Calibration
The ADE7758 incorporates a VAR offset register on each phase
(AVAROS, BVAROS, and CVAROS). These are signed twos
complement, 12-bit registers that are used to remove offsets in
the reactive power calculations. An offset can exist in the power
calculation due to crosstalk between channels on the PCB or in
the chip itself. The offset calibration allows the contents of the
reactive power register to be maintained at 0 when no reactive
power is being consumed. The offset registers’ resolution is the
same as the active power offset registers (see the Apparent
Power Offset Calibration section).
Sign of Reactive Power Calculation
Note that the average reactive power is a signed calculation. As
stated previously, the phase shift filter has –90° phase shift when
the integrator is enabled and +90° phase shift when the
integrator is disabled.
Table 12 summarizes the relationship between the phase difference
between the voltage and the current and the sign of the resulting
VAR calculation.
The ADE7758 has a sign detection circuit for the reactive power
calculation. The REVPRP bit (Bit 18) in the interrupt status
register is set if the average reactive power from any one of the
phases changes. The phases monitored are selected by TERMSEL
bits in the COMPMODE register (see Table 21). If the REVPRP
bit is set in the mask register, the IRQ logic output goes active
low (see the
there is a sign change; that is, the bit is set for either a positive-
to-negative change or a negative-to-positive change of the sign
bit. The response time of this bit is approximately 176 ms for a
full-scale signal, which has an average value of 0xCCCCD at the
low-pass filter output. For smaller inputs, the time is longer.
Table 12. Sign of Reactive Power Calculation
Φ
Between 0 to +90
Between −90 to 0
Between 0 to +90
Between −90 to 0
1
signal; that is, Φ is positive if the load is inductive and negative if the load is
capacitive.
Φ is defined as the phase angle of the voltage signal minus the current
1
Re
sponseTime
Interrupts
≅
1
section). Note that this bit is set whenever
Integrator
Off
Off
On
On
60
ms
+
⎡
⎢
⎣
AverageVal
Sign of Reactive Power
Positive
Negative
Positive
Negative
2
25
ue
⎤
⎥
⎦
×
CLKIN
4
(33)