ADE7758ARWZRL Analog Devices Inc, ADE7758ARWZRL Datasheet - Page 66
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ADE7758ARWZRL
Manufacturer Part Number
ADE7758ARWZRL
Description
IC,Power Metering,SOP,24PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7758ARWZ.pdf
(72 pages)
Specifications of ADE7758ARWZRL
Input Impedance
380 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
8mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Meter Type
3 Phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7758ARWZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADE7758
COMPUTATIONAL MODE REGISTER (0x16)
The computational method of the ADE7758 is defined by writing to the COMPMODE register. Table 21 summarizes the functionality of
each bit in the COMPMODE register.
Table 21. COMPMODE Register
Bit
Location
0 to 1
2 to 4
5
6
7
Bit
Mnemonic
CONSEL
TERMSEL
ABS
SAVAR
NOLOAD
Default
Value
0
7
0
0
0
Description
These bits are used to select the input to the energy accumulation registers. CONSEL[1:0] = 11 is
reserved. IA, IB, and IC are IA, IB, and IC phase shifted by –90°, respectively.
Registers
AWATTHR
BWATTHR
CWATTHR
AVARHR
BVARHR
CVARHR
AVAHR
BVAHR
CVAHR
These bits are used to select the phases to be included in the APCF and VARCF pulse outputs. Setting
Bit 2 selects Phase A (the inputs to AWATTHR and AVARHR registers) to be included. Bit 3 and Bit 4
are for Phase B and Phase C, respectively. Setting all three bits enables the sum of all three phases to
be included in the frequency outputs (see the Active Power Frequency Output and the Reactive
Power Frequency Output sections).
Setting this bit places the APCF output pin in absolute only mode. Namely, the APCF output
frequency is proportional to the sum of the absolute values of the watt-hour accumulation registers
(AWATTHR, BWATTHR, and CWATTHR). Note that this bit only affects the APCF pin and has no effect
on the content of the corresponding registers.
Setting this bit places the VARCF output pin in the signed adjusted mode. Namely, the VARCF output
frequency is proportional to the sign-adjusted sum of the VAR-hour accumulation registers (AVARHR,
BVARHR, and CVARHR). The sign of the VAR is determined from the sign of the watt calculation from
the corresponding phase, that is, the sign of the VAR is flipped if the sign of the watt is negative, and
if the watt is positive, there is no change to the sign of the VAR. Note that this bit only affects the
VARCF pin and has no effect on the content of the corresponding registers.
Setting this bit activates the no-load threshold in the ADE7758.
CONSEL[1, 0] = 00
VA × IA
VB × IB
VC × IC
VA × IA
VB × IB
VC × IC
VA
VB
VC
RMS
RMS
RMS
× IA
× IB
× IC
Rev. D | Page 66 of 72
RMS
RMS
RMS
CONSEL[1, 0] = 01
VA × (IA – IB)
0
VC × (IC – IB)
VA × (IA – IB)
0
VC × (IC – IB)
VA
(VA
VC
RMS
RMS
RMS
× IA
× IC
+ VC
RMS
RMS
RMS
)/2 × IB
RMS
CONSEL[1, 0] = 10
VA × (IA–IB)
0
VC × IC
VA × (IA–IB)
0
VC × IC
VA
VA
VC
RMS
RMS
RMS
× A
× IB
× IC
RMS
RMS
RMS