ADN2525ACPZ-WP Analog Devices Inc, ADN2525ACPZ-WP Datasheet - Page 10

IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC

ADN2525ACPZ-WP

Manufacturer Part Number
ADN2525ACPZ-WP
Description
IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Laser Diode Driver (Fiber Optic)r
Datasheet

Specifications of ADN2525ACPZ-WP

Data Rate
10.7Gbps
Number Of Channels
1
Voltage - Supply
3.07 V ~ 3.53 V
Current - Supply
39mA
Current - Modulation
80mA
Current - Bias
100mA
Operating Temperature
-40°C ~ 85°C
Package / Case
16-VFQFN, CSP Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADN2525
The equivalent circuits of the BSET, IBIAS, and IBMON pins
are shown in Figure 20, Figure 21, and Figure 22.
The recommended configuration for BSET, IBIAS, and IBMON
is shown in Figure 23.
The circuit used to drive the BSET voltage must be able to drive
the 1 kΩ input resistance of the BSET pin. For proper operation
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
See the Applications Information section for examples of
headroom calculations.
Figure 23. Recommended Configuration for the BSET, IBIAS, and IBMON Pins
V
COMPLIANCE_MAX
V
BSET
BSET
Figure 22. Equivalent Circuit of the IBMON Pin
Figure 21. Equivalent Circuit of the IBIAS Pin
Figure 20. Equivalent Circuit of the BSET Pin
VCC
(V) = VCC (V) − 0.75 − 4.4 × IBIAS (A)
VCC
BSET
VCC
ADN2525
IBIAS
GND
800Ω
200Ω
VCC
2Ω
IBMON
100Ω
IBIAS
IBMON
TO LASER CATHODE
VCC
VCC
500Ω
100Ω
VCC
L
2kΩ
R
1kΩ
IBMON
IBIAS
Rev. A | Page 10 of 16
The function of the inductor L is to isolate the capacitance of
the IBIAS output from the high frequency signal path. For
recommended components, see Table 6.
AUTOMATIC LASER SHUTDOWN (ALS)
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
as shown in Table 5.
Table 5.
ALS Logic State
High
Low
Floating
The ALS pin is compatible with 3.3 V CMOS and TTL logic
levels. Its equivalent circuit is shown in Figure 24.
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current by using a voltage-to-current converter using an
operational amplifier and a bipolar transistor, as shown in
Figure 25.
This dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and gained up by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins.
The output stage also generates the active back-termination,
which provides proper transmission line termination. Active
back-termination uses feedback around an active circuit to
synthesize a broadband termination resistance. This provides
MSET
Figure 25. Generation of Modulation Current on the ADN2525
FROM INPUT STAGE
800Ω
200Ω
Figure 24. Equivalent Circuit of the ALS Pin
ALS
GND
VCC
VCC
50kΩ
100Ω
IBIAS and IMOD
Disabled
Enabled
Enabled
VCC
2kΩ
ADN2525
50Ω
IMOD
IMODP
IMODN

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