ADN2525ACPZ-WP Analog Devices Inc, ADN2525ACPZ-WP Datasheet - Page 13

IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC

ADN2525ACPZ-WP

Manufacturer Part Number
ADN2525ACPZ-WP
Description
IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Laser Diode Driver (Fiber Optic)r
Datasheet

Specifications of ADN2525ACPZ-WP

Data Rate
10.7Gbps
Number Of Channels
1
Voltage - Supply
3.07 V ~ 3.53 V
Current - Supply
39mA
Current - Modulation
80mA
Current - Bias
100mA
Operating Temperature
-40°C ~ 85°C
Package / Case
16-VFQFN, CSP Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
Figure 33 shows the typical application circuit for the ADN2525.
The dc voltages applied to the BSET and MSET pins control the
bias and modulation currents. The bias current can be monitored
as a voltage drop across the 1 kΩ resistor connected between
the IBMON pin and GND. The ALS pin allows the user to turn
on/off the bias and modulation currents, depending on the logic
level applied to the pin. The data signal source must be connected
to the DATAP and DATAN pins of the ADN2525 using 50 Ω
transmission lines. The modulation current outputs, IMODP
and IMODN, must be connected to the load (TOSA) using 50 Ω
differential (25 Ω single-ended) transmission lines. Table 6
shows recommended components for the ac-coupling interface
between the ADN2525 and TOSA. For up-to-date component
recommendations, contact sales.
Working with a TOSA laser sample, the circuit in Figure 33 delivers
the optical performance shown in Figure 15 and Figure 16. For
additional applications information and optical eye performance of
other laser samples, contact ADI sales or see the ADN2525
application notes at www.analog.com.
Table 6.
Component
R1, R2
R3, R4
C3, C4
L2, L3, L6, L7
L1, L4, L5, L8
Value
36 Ω
200 Ω
100 nF
82 nH
10 μH
DATAP
DATAN
MSET
BSET
3.3V
0603 size resistor
0603 size resistor
Description
0603 size capacitor,
Phycomp 223878615649
0402 size inductor,
Murata LQW15AN82NJ0
0603 size inductor,
Murata LQM21FN100M70L
Z
Z
0
0
= 50Ω
= 50Ω
VCC
VCC
C1
C2
GND
C7
200µF
VCC
DATAP
DATAN
VCC
VCC
Figure 33. Typical ADN2525 Application Circuit
MSET NC1
GND
BSET IBMON IBIAS GND
TP1
ADN2525
R5
1kΩ
Rev. A | Page 13 of 16
ALS
ALS
GND
IMODP
IMODN
VCC
VCC
10nF
10nF
GND
C5
C6
GND
VCC
VCC
Z
Z
LAYOUT GUIDELINES
Due to the high frequencies at which the ADN2525 operates,
care should be taken when designing the PCB layout to obtain
optimum performance. Controlled impedance transmission
lines must be used for the high speed signal paths. The length of
the transmission lines must be kept to a minimum to reduce
losses and pattern-dependent jitter. The PCB layout must be
symmetrical, both on the DATAP and DATAN inputs and on
the IMODP and IMODN outputs, to ensure a balance between
the differential signals. All VCC and GND pins must be connected
to solid copper planes by using low inductance connections.
When the connections are made through vias, multiple vias
can be connected in parallel to reduce the parasitic inductance.
Each GND pin must be locally decoupled with high quality
capacitors. If proper decoupling cannot be achieved using a
single capacitor, the user can use multiple capacitors in parallel
for each GND pin. A 20 μF tantalum capacitor must be used as a
general decoupling capacitor for the entire module. For guidelines
on the surface-mount assembly of the ADN2525, see Amkor
Technology® Application Notes for Surface Mount Assembly of
Amkor’s MicroLeadFrame® (MLF) Packages.
0
0
VCC
VCC
= 25Ω
= 25Ω
GND
GND
L4
L1
L2
L3
VCC
VCC
R1
R2
C4
C3
L5
L8
L7
L6
VCC
Z
Z
0
0
= 25Ω
= 25Ω
R4
R3
TOSA
ADN2525

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