ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 69

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ADUC7039BCP6Z-RL

Manufacturer Part Number
ADUC7039BCP6Z-RL
Description
Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7039BCP6Z-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7039BCP6Z-RL
Manufacturer:
NS/国半
Quantity:
20 000
GPIO Port Control Register
Name:
Address:
Default Value:
Access:
Function:
Table 50. GPCON MMR Bit Designations
Bit
31 to 21
20
19 to 17
16
15 to 13
12
11 to 9
8
7 to 5
4
3 to 1
0
GPCON
0xFFFF0D00
0x00000000
Read/write
The 32-bit MMR selects the pin function for each port pin.
Description
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_5 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_5 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_5 pin as LIN output for LIN conformance testing.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_4 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_4 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_4 pin as LIN input for LIN conformance testing.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_3 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_3 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_3 pin as MOSI, master output, and slave input data for the SPI port.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_2 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_2 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_2 pin as MISO, master input, and slave output data for the SPI port.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_1 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_1 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_1 pin as SCLK, serial clock I/O for the SPI port.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_0 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_0 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_0 pin as SS, slave select input for the SPI port.
Rev. B | Page 69 of 92
ADuC7039

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