EP3C16F484A7N Altera, EP3C16F484A7N Datasheet - Page 255
EP3C16F484A7N
Manufacturer Part Number
EP3C16F484A7N
Description
Cyclone III
Manufacturer
Altera
Datasheet
1.EP3C16F484A7N.pdf
(274 pages)
Specifications of EP3C16F484A7N
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / Rohs Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
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EP3C16F484A7N
Manufacturer:
ALTERA
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Error Detection Fundamentals
© December 2009
CIII51013-2.2
Altera Corporation
Dedicated circuitry built into the Cyclone
Cyclone III LS devices) consists of a cyclical redundancy check (CRC) error detection
feature that can optionally check for a single-event upset (SEU) continuously and
automatically.
In critical applications used in the fields of avionics, telecommunications, system
control, medical, and military applications, it is important to be able to:
■
■
This chapter describes how to activate and use the error detection CRC feature in user
mode and describes how to recover from configuration errors caused by CRC error.
Using the CRC error detection feature for Cyclone III device family does not impact
fitting or performance.
This chapter contains the following sections:
■
■
■
■
■
■
■
■
■
■
Error detection determines if the data received through an input device is corrupted
during transmission. In validating the data, the transmitter uses a function to
calculate a checksum value for the data and appends the checksum to the original
data frame. The receiver uses the same calculation methodology to generate a
checksum for the received data frame and compares the received checksum to the
transmitted checksum. If the two checksum values are equal, the received data frame
is correct and no data corruption has occurred during transmission or storage.
The error detection CRC feature in Cyclone III device family puts theory into practice.
In user mode, the error detection CRC feature in Cyclone III device family ensures the
integrity of the configuration data.
Confirm the accuracy of the configuration data stored in an FPGA device
Alert the system to an occurrence of a configuration error
“Error Detection Fundamentals” on page 11–1
“Configuration Error Detection” on page 11–2
“User Mode Error Detection” on page 11–2
“Automated SEU Detection” on page 11–3
“CRC_ERROR Pin” on page 11–3
“Table 11–2 lists the CRC_ERROR pin.” on page 11–3
“Error Detection Block” on page 11–4
“Error Detection Timing” on page 11–5
“Software Support” on page 11–6
“Recovering from CRC Errors” on page 11–10
11. SEU Mitigation in the Cyclone III
®
III device family (Cyclone III and
Cyclone III Device Handbook, Volume 1
Device Family
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