KSZ8851-16MLL TR Micrel Inc, KSZ8851-16MLL TR Datasheet - Page 46

• Manufacturer Part Number: KSZ8851-16MLL TR
• Description: Single Ethernet Port + Generic (16-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8851-16MLL TR

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Compliant

Wakeup Frame 2 CRC1 Register (0x52 – 0x53): WF2CRC1
This register contains the expected CRC values of the wake-up frame 2 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Wakeup Frame 2 Byte Mask 0 Register (0x54 – 0x55): WF2BM0
This register contains the first 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the first byte
of the Wake up frame 2, setting bit 15 selects the 16th byte of the Wake up frame 2.
Wakeup Frame 2 Byte Mask 1 Register (0x56 – 0x57): WF2BM1
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 2. Setting bit 15 selects the 32nd byte of the Wake up frame 2.
Wakeup Frame 2 Byte Mask 2 Register (0x58 – 0x59): WF2BM2
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 2. Setting bit 15 selects the 48th byte of the Wake up frame 2.
Wakeup Frame 2 Byte Mask 3 Register (0x5A – 0x5B): WF2BM3
This register contains the last 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 2. Setting bit 15 selects the 64th byte of the Wake up frame 2.
0x5C – 0x5F: Reserved
Wakeup Frame 3 CRC0 Register (0x60 – 0x61): WF3CRC0
This register contains the expected CRC values of the Wake up frame 3 pattern. The value of the CRC calculated is
based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in the wake-up byte mask registers.
August 2009
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0x0000
Default Value
0x0000
Default Value
0x0000
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF2CRC1
Wake-up frame 2 CRC (upper 16 bits). The expected CRC value of a Wake-up frame
2 pattern.
Description
WF2BM0
Wake-up frame 2 Byte Mask 0. The first 16 bytes mask of a Wake-up frame 2 pattern.
Description
WF2BM1
Wake-up frame 2 Byte Mask 1. The next 16 bytes mask covering bytes 17 to 32 of a
Wake-up frame 2 pattern.
Description
WF2BM2
Wake-up frame 2 Byte Mask 2. The next 16 bytes mask covering bytes 33 to 48 of a
Wake-up frame 2 pattern.
Description
WF2BM3
Wake-up frame 2 Byte Mask 3. The last 16 bytes mask covering bytes 49 to 64 of a
Wake-up frame 2 pattern.
Description
WF3CRC0
Wake-up frame 3 CRC (lower 16 bits). The expected CRC value of a Wake up frame 3
pattern.
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KSZ8851-16MLL/MLLI
M9999-083109-2.0