FDD3672 Fairchild Semiconductor, FDD3672 Datasheet
FDD3672
Specifications of FDD3672
FDD3672TR
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FDD3672 Summary of contents
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... High Voltage Synchronous Rectifier DRAIN (FLANGE 25°C unless otherwise noted C Parameter 10V 10V 10V C/W) θ copper pad area certification. March 2010 Ratings 100 ± 6.5 Figure 4 120 135 0.9 -55 to 175 1.11 100 52 FDD3672 Rev. A2 Units C/W o C/W o C/W ...
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... 44A 21A 44A, dI /dt =100A/µ 44A, dI /dt =100A/µ Tape Width Quantity 16mm 2500 units Min Typ Max Units 100 - - µ 250 ±100 - - 0.024 0.028 Ω - 0.031 0.047 0.054 0.068 - 1710 - pF - 247 - 104 104 1. 1 FDD3672 Rev. A2 ...
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... Figure 2. Maximum Continuous Drain Current RECTANGULAR PULSE DURATION ( PULSE WIDTH (s) Figure 4. Peak Current Capability V = 10V 100 125 150 CASE TEMPERATURE ( C) C Case Temperature NOTES: DUTY FACTOR PEAK θJC θ FOR TEMPERATURES o ABOVE 25 C DERATE PEAK CURRENT AS FOLLOWS: 175 - 150 - FDD3672 Rev. A2 175 ...
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... V = 10V 44A GS D 0.4 80 120 160 200 - Figure 10. Normalized Gate Threshold Voltage vs = 15V 175 - 4.0 4.5 5.0 5.5 6 GATE TO SOURCE VOLTAGE ( 10V DRAIN CURRENT (A) D Current 250µ - 120 160 JUNCTION TEMPERATURE ( C) J Junction Temperature 6.5 50 200 FDD3672 Rev. A2 ...
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... THIS AREA IS LIMITED WAVEFORMS IN DESCENDING ORDER 44A 21A D 0 ISS GS GD ≅ OSS RSS 0V 1MHz DRAIN TO SOURCE VOLTAGE (V) DS Voltage 100 us DS(on SINGLE PULSE T = MAX RATED 1.11 C 100 V , DRAIN to SOURCE VOLTAGE (V) DS Figure 14. Forward Bias Safe Operating Area 100 300 FDD3672 Rev. A2 ...
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... Figure 18. Switching Time Test Circuit ©2010 Fairchild Semiconductor Corporation DUT 0.01Ω Figure 15. Unclamped Energy Waveforms DUT g(TH g(REF) 0 Figure 17. Gate Charge Waveforms d(ON 90 DUT V GS 50% 10% 0 Figure 19. Switching Time Waveforms BV DSS g(TOT 10V GS Q gs2 OFF t d(OFF 10% 10% 90% 50% PULSE WIDTH FDD3672 Rev 90% ...
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... C/W) θJA is never exceeded (EQ 0.01 (0.0645 Figure 20. Thermal Resistance vs Mounting dissipation. Pulse (EQ. 2) Area in Inches Squared (EQ. 3) Area in Centimeters Squared R = 33.32+ 23.84/(0.268+Area) EQ.2 θ 33.32+ 154/(1.73+Area) EQ.3 θJA 0 (0.645) (6.45) (64. AREA, TOP COPPER AREA in (cm ) Pad Area FDD3672 Rev. A2 ...
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... PSPICE Electrical Model .SUBCKT FDD3672 rev May 2002 5.8e- 6.8e-10 Cin 6 8 1.6e-9 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Dplcap 10 5 DplcapMOD Ebreak 105 Eds Egs Esg Evthres Evtemp GATE Lgate 1 9 9.56e-9 Ldrain 2 5 1.0e-9 Lsource 3 7 4.45e-9 RLgate 1 9 95.6 RLdrain RLsource ...
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... RSLC2 - RDRAIN 6 ESG 8 EVTHRES + LGATE EVTEMP 8 RGATE + MSTRO RLGATE CIN S1A S2A S1B S2B EGS EDS LDRAIN DRAIN RLDRAIN RSLC1 ISCL DBREAK 50 11 DBODY 16 MWEAK EBREAK MMED + 17 18 LSOURCE - SOURCE 8 7 RSOURCE RLSOURCE RBREAK 17 18 RVTEMP VBAT + 8 22 RVTHRES FDD3672 Rev ...
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... RTHERM1 TH 6 5.5e-4 RTHERM2 6 5 5.0e-3 RTHERM3 5 4 4.5e-2 RTHERM4 4 3 10.5e-2 RTHERM5 3 2 3.4e-1 RTHERM6 2 TL 3.5e-1 SABER Thermal Model SABER thermal model FDD3672 template thermal_model th tl thermal_c th cctherm.ctherm1 th 6 =3.2e-3 ctherm.ctherm2 6 5 =3.3e-3 ctherm.ctherm3 5 4 =3.4e-3 ctherm.ctherm4 4 3 =3.5e-3 ctherm ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. AccuPower™ Auto-SPM™ Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ ...