STW7N95K3 STMicroelectronics, STW7N95K3 Datasheet - Page 4

• Manufacturer Part Number: STW7N95K3
• Description: MOSFET N-CH 950V 7.2A TO-247
• Manufacturer: STMicroelectronics
• Series: SuperMESH™r

Specifications of STW7N95K3

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 1.35 Ohm @ 3.6A, 10V
• Drain To Source Voltage (vdss): 950V
• Current - Continuous Drain (id) @ 25° C: 7.2A
• Vgs(th) (max) @ Id: 5V @ 100µA
• Gate Charge (qg) @ Vgs: 34nC @ 10V
• Input Capacitance (ciss) @ Vds: 1031pF @ 100V
• Power - Max: 150W
• Mounting Type: Through Hole
• Package / Case: TO-247-3
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 1.35 Ohms
• Drain-source Breakdown Voltage: 950 V
• Gate-source Breakdown Voltage: +/- 30 V
• Continuous Drain Current: 7.2 A
• Power Dissipation: 150 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8798-5

Electrical characteristics
2
4/15
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4.
Table 5.
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
2. C
3. C
V
Symbol
Symbol
C
R
C
V
(BR)DSS
g
when V
C
C
o(er)
I
I
C
DS(on)
C
o(tr)
Q
GS(th)
Q
GSS
R
DSS
fs
Q
oss eq.
oss eq.
oss
oss
iss
rss
gs
gd
G
g
(1)
(2)
(3)
when V
DS
time related is defined as a constant equivalent capacitance giving the same charging time as C
energy related is defined as a constant equivalent capacitance giving the same stored energy as
Forward
transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent
capacitance time
related
Equivalent
capacitance energy
related
Gate input resistance
Total gate charge
Gate-source charge
Gate-drain charge
increases from 0 to 80% V
Drain-source
breakdown voltage
Zero gate voltage
drain current (V
Gate-body leakage
current (V
Gate threshold voltage V
Static drain-source on
resistance
On /off states
Dynamic
DS
increases from 0 to 80% V
Parameter
Parameter
DS
= 0)
GS
= 0)
DSS
V
V
V
V
V
f=1 MHz Gate DC Bias=0 Test
signal level = 20 mV open
drain
V
V
(see
I
V
V
V
V
D
DS
DS
GS
DS
DS
DD
GS
DS
DS
GS
DS
GS
= 1 mA, V
DSS
= Max rating
= Max rating, T
= 15 V, I
= 100 V, f = 1 MHz,
= 0
= 0 to 760 V, V
= 0 to 760 V, V
= 10 V
= ± 20 V
= V
= 10 V, I
= 760 V, I
Figure
Test conditions
Test conditions
GS
, I
20)
GS
D
D
D
D
= 100 µA
= 3.6 A
= 3.6 A
= 0
= 7.2 A,
STF7N95K3, STP7N95K3, STW7N95K3
GS
GS
C
=125 °C
= 0
= 0
Min.
Min.
950
3
1031
Typ.
Typ.
0.9
2.4
1.1
79
60
36
34
20
4
5
6
Max.
Max.
1.35
50
10
1
5
oss
Unit
Unit
nC
nC
nC
µA
µA
µA
pF
pF
pF
pF
pF
Ω
Ω
V
V
S