FDS2170N7 Fairchild Semiconductor, FDS2170N7 Datasheet - Page 2

MOSFET N-CH 200V 3A 8-SOIC

FDS2170N7

Manufacturer Part Number
FDS2170N7
Description
MOSFET N-CH 200V 3A 8-SOIC
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDS2170N7

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
128 mOhm @ 3A, 10V
Drain To Source Voltage (vdss)
200V
Current - Continuous Drain (id) @ 25° C
3A
Vgs(th) (max) @ Id
4.5V @ 250µA
Gate Charge (qg) @ Vgs
36nC @ 10V
Input Capacitance (ciss) @ Vds
1292pF @ 100V
Power - Max
1.8W
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDS2170N7TR
FDS2170N7_NL
FDS2170N7_NLTR
FDS2170N7_NLTR

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Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
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Part Number:
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Manufacturer:
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Quantity:
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Notes:
1. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
t
Q
Drain-Source Avalanche Ratings
W
I
R
Electrical Characteristics
Symbol
Off Characteristics
BV
∆BV
I
I
I
On Characteristics
V
∆V
R
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
rr
AR
DSS
GSSF
GSSR
d(on)
r
d(off)
f
S
drain pins. R
FS
G
GS(th)
DS(on)
iss
oss
rss
SD
rr
∆T
∆T
g
gs
gd
DSS
θJA
GS(th)
DSS
DSS
J
J
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
θJC
Drain-Source Avalanche Energy
Drain-Source Avalanche Current
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
is guaranteed by design while R
Parameter
(Note 2)
a)
(Note 2)
θCA
40°C/W when
mounted on a 1in
of 2 oz copper
is determined by the user's board design.
Single Pulse, V
V
I
V
V
V
V
I
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
V
I
d
D
D
F
T
iF
GS
DS
GS
GS
DS
GS
GS
DS
DS
GS
DD
GS
DS
GS
GS
A
= 3.0A
2
= 250 µA, Referenced to 25°C
= 250 µA, Referenced to 25°C
/d
= 25°C unless otherwise noted
pad
= 0 V,
= 160 V,
= 20 V,
= –20 V,
= V
= 10 V,
= 10 V, I
= 10 V,
= 100 V,
= 15 mV, f = 1.0 MHz
= 100 V,
= 10 V,
= 100 V,
= 10 V
= 0 V,
t
= 100 A/µs
Test Conditions
GS
,
D
I
S
= 3.0 A,T
I
V
V
V
I
I
I
V
I
R
I
= 2.5 A
DD
D
D
D
D
D
D
GS
DS
DS
GEN
GS
= 250 µA
= 250 µA
= 3.0 A
= 3.0 A
= 1 A,
= 3.0 A,
= 200 V, I
= 0 V
= 0 V
= 0 V
= 0 V,
= 6 Ω
J
= 125°C
(Note 2)
(Note 2)
D
=10 A
Min
200
b)
2
85°C/W when mounted on
a minimum pad of 2 oz
copper
213
Typ
1292
0.76
231
–10
107
552
1.5
15
72
24
12
30
23
26
10
95
4
5
7
268
Max Units
–100
400
100
128
4.5
2.5
1.2
FDS2170N7 Rev D (W)
10
22
10
48
36
36
1
mV/°C
mV/°C
mΩ
mJ
nC
nC
nC
µA
nA
nA
pF
pF
pF
nC
ns
ns
ns
ns
nS
A
V
V
S
A
V

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