HSMP-3816-BLKG Avago Technologies US Inc., HSMP-3816-BLKG Datasheet - Page 4
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HSMP-3816-BLKG
Manufacturer Part Number
HSMP-3816-BLKG
Description
DIODE PIN ATTEN QUAD SOT-25
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HSMP-3812-BLKG.pdf
(9 pages)
Specifications of HSMP-3816-BLKG
Package / Case
SOT-23-5, SC-74A, SOT-25
Current - Max
1A
Voltage - Peak Reverse (max)
100V
Capacitance @ Vr, F
0.35pF @ 50V, 1MHz
Resistance @ If, F
3 Ohm @ 100mA, 100MHz
Capacitance Cd Max @ Vr F
0.35pF
Resistance @ If
3ohm
Center Frequency
106GHz
Repetitive Reverse Voltage Vrrm Max
100V
Forward Current If(av)
1A
Diode Case Style
SOT-25
Diode Type
RF Pin
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HSMP-3816-BLKG
Manufacturer:
Avago Technologies US Inc.
Quantity:
135
Company:
Part Number:
HSMP-3816-BLKG
Manufacturer:
Zilog
Quantity:
79
Part Number:
HSMP-3816-BLKG
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Typical Applications for HSMP-481x Low Inductance Series
Microstrip Series Connection for HSMP-481x Series
In order to take full advantage of the low inductance of the
HSMP-481x series when using them in series applications,
both lead 1 and lead 2 should be connected together, as
shown in Figure 7.
Figure 6. Internal Connections.
Microstrip Shunt Connections for HSMP-481x Series
In Figure 8, the center conductor of the microstrip
line is interrupted and leads 1 and 2 of the HSMP-481x
series diode are placed across the resulting gap. This forces
the 1.5 nH lead inductance of leads 1 and 2 to appear as
part of a low pass filter, reducing the shunt
parasitic inductance and increasing the maximum available
attenuation. The 0.3 nHof shunt inductance external to the
diode is created by the via holes, and is a good estimate
for 0.032" thick material.
Figure 8. Circuit Layout.
4
50 OHM MICROSTRIP LINES
1
HSMP-481x
PAD CONNECTED TO
3
GROUND BY TWO
VIA HOLES
2
Figure 7. Circuit Layout.
Figure 9. Equivalent Circuit.
R
j
1.5 nH
0.08
I
b
0.9
R
+ 2.5
j
0.3 nH
0.3 nH
0.3 pF
1.5 nH