PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 267

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
RIL(2:0)
JATT, RL
DRS
Data Sheet
Receive Input Threshold
Only valid if analog line interface is selected (LIM1.DRS = 0).
“No signal” is declared if the voltage between pins RL1 and RL2 drops
below the limits programmed by bits RIL(2:0) and the received data
stream has no transition for a period defined in the PCD register.
The threshold where “no signal” is declared is programmable by the
RIL(2:0) bits.
See DC characteristics for detail.
Remote Loop Transmit Jitter Attenuator
00 = Normal operation. The remote loop transmit jitter attenuator is
01 = Remote loop active without remote loop transmit jitter
10 = not defined
11 = Remote loop and remote loop jitter attenuator active. Received
Note:JATT is only used to define the jitter attenuation during remote
Dual-Rail Select
0 =
1 =
disabled. Transmit data bypasses the remote loop jitter
attenuator buffer.
attenuator enabled. Transmit data bypasses the remote loop
jitter attenuator buffer.
data from pins RL1/2 or RDIP/N or ROID is sent "jitter-free" on
ports XL1/2 or XDOP/N or XOID. The de-jittered clock is
generated by the DCO-X circuitry.
The ternary interface is selected. Multifunction ports RL1/2 and
XL1/2 become analog in/outputs.
The digital dual-rail interface is selected. Received data is
latched on multifunction ports RDIP/RDIN while transmit data is
output on pins XDOP/XDON.
loop operation. Jitter attenuation during normal operation is
not affected.
267
Rev. 1.1, 2005-06-13
PEF 2256 H/E
E1 Registers
FALC
®
56

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