PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 385

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Data Sheet
Receive Frame Marker Offset (PC(4:1).RPC(2:0) = 001
Offset programming of the receive frame marker which is output on
multifunction port RFM. The receive frame marker can be activated
during any bit position of the entire frame and depends on the
selected system clock rate.
Calculation of the value X of the receive offset register RC(1:0)
depends on the bit position which should be marked at marker
position MP:
system clocking rate: modulo 2.048 MHz (SIC2.SSC2 = 0)
0
2046
e.g: 2.048 MHz: MP = 0 to 255; 4.096 MHz: MP = 0 to 511,
8.192 MHz: MP = 0 to 1023, 16.384 MHz: MP = 0 to 2047
system clocking rate: modulo 1.544 MHz (SIC2.SSC2 = 1)
0
193
X = MP + 2 - 186
with maximum delay = 193 SC/SD - 1
with SC = system clock defined by SIC1.SSC(1:0)+SIC2.SSC2
with SD = system data rate
MP
MP
(SC/SD) -2
MP
193
2045:X = MP + 2
2047:X = MP - 2046)
(SC/SD) - 3:X = MP + 2 + 7
SC/SD
MP
385
maximum delay:
SC/SD
Rev. 1.1, 2005-06-13
T1/J1 Registers
PEF 2256 H/E
B
FALC
)
®
56