PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 400

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
RBS(1:0)
BIM
XBS(1:0)
System Interface Control 2 (Read/Write)
Value after reset: 00
SIC2
FFS
Data Sheet
FFS
7
Receive Buffer Size
00 = Buffer size: 2 frames
01 = Buffer size: 1 frame
10 = Buffer size: 96 bits
11 = Bypass of receive elastic store
Bit Interleaved Mode
Only applicable if bit SIC2.SSC2 is cleared. If SIC2.SSC2 is set high,
the bit interleaved mode is automatically performed.
0 =
1 =
Transmit Buffer Size
00 = Bypass of transmit elastic store
01 = Buffer size: 1 frame
10 = Buffer size: 2 frames
11 = Buffer size: 96 bits
Force Freeze Signaling
Setting this bit disables updating of the receive signaling buffer and
current signaling information is frozen. After resetting this bit and
receiving a complete superframe updating of the signaling buffer is
started again. The freeze signaling status can also be generated
automatically by detection of a loss-of-signal alarm or a loss of frame
alignment or a receive slip (only if external register access through
RSIG is enabled). This automatic freeze signaling function is logically
ored with this bit.
The current internal freeze signaling status is output on pin RP(A to
D) with selected pin function FREEZE (PC(4:1).RPC(2:0) = 110).
Additionally this status is also available in register SIS.SFS.
SSF
H
Byte interleaved mode
Bit interleaved mode
CRB
SSC2
400
SICS2
SICS1
SICS0
Rev. 1.1, 2005-06-13
T1/J1 Registers
PEF 2256 H/E
0
FALC
(3F)
®
56

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