82P2282PF IDT, Integrated Device Technology Inc, 82P2282PF Datasheet - Page 145

82P2282PF

Manufacturer Part Number
82P2282PF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2282PF

Screening Level
Industrial
Pin Count
100
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
T1/J1 Transmit And Receive Termination Configuration (032H, 132H)
T_TERM[2:0]:
R_TERM[2:0]:
T1/J1 Interrupt Enable Control 0 (033H, 133H)
DF_IE:
LOS_IE:
Programming Information
IDT82P2282
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
These bits select the internal impedance of the transmit path to match the cable impedance:
= 000: The 75 Ω internal impedance matching is selected.
= 001: The 120 Ω internal impedance matching is selected.
= 010: The 100 Ω internal impedance matching is selected. (It is the standard value for T1 mode).
= 011: The 110 Ω internal impedance matching is selected. (It is the standard value for J1 mode).
= 1xx: Reserved.
In T1/J1 mode, the external impedance circuit is not supported in transmit path.
These bits select the internal impedance of the receive path to match the cable impedance:
= 000: The 75 Ω internal impedance matching is selected.
= 001: The 120 Ω internal impedance matching is selected.
= 010: The 100 Ω internal impedance matching is selected. (It is the standard value for T1 mode).
= 011: The 110 Ω internal impedance matching is selected. (It is the standard value for J1 mode).
= 1xx: The internal impedance matching is bypassed, and external impedance circuit should be used.
= 0: Disable the interrupt on the INT pin when the DF_IS bit (b2, T1/J1-03AH,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the DF_IS bit (b2, T1/J1-03AH,...) is ‘1’.
= 0: Disable the interrupt on the INT pin when the LOS_IS bit (b0, T1/J1-03AH,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the LOS_IS bit (b0, T1/J1-03AH,...) is ‘1’.
7
7
Reserved
6
6
T_TERM2
Reserved
R/W
5
0
5
T_TERM1
R/W
4
0
4
145
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
T_TERM0
R/W
3
0
3
R_TERM2
DF_IE
R/W
R/W
2
1
2
0
R_TERM1
Reserved
R/W
1
1
1
August 20, 2009
R_TERM0
LOS_IE
R/W
R/W
0
1
0
0

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