EMC2303-1-KP-TR Standard Microsystems (SMSC), EMC2303-1-KP-TR Datasheet - Page 30

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EMC2303-1-KP-TR

Manufacturer Part Number
EMC2303-1-KP-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of EMC2303-1-KP-TR

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
12
Lead Free Status / RoHS Status
Compliant
ADDR
29h
Revision 1.2 (03-22-10)
5.3.2
5.3.3
5.3.4
5.4
R/W
R/W
REGISTER
Interrupt
Enable
Fan
Bit 0 - FAN_STALL - Indicates that one or more fan drivers have stalled. This bit is set when any bit
in the Fan Stall Status register is set and cleared when all of the bits in the Fan Stall Status register
are cleared.
Fan Stall Status - 25h
The Fan Stall Status register indicates which fan driver has detected a stalled condition (see
Section
Bit 2 - FAN3_STALL - Indicates that Fan 3 has stalled.
Bit 1 - FAN2_STALL - Indicates that Fan 2 has stalled.
Bit 0 - FAN1_STALL - Indicates that Fan 1 has stalled.
Fan Spin Status - 26h
The Fan Spin Status register indicates which fan driver has failed to spin-up (see
are cleared upon a read if the error condition has been removed.
Bit 2 - FAN3_SPIN - Indicates that Fan 3 has failed to spin up.
Bit 1 - FAN2_SPIN - Indicates that Fan 2 has failed to spin up.
Bit 0 - FAN1_SPIN - Indicates that Fan 1 has failed to spin up.
Fan Drive Fail Status - 27h
The Fan Drive Fail Status register indicates which fan driver cannot drive to the programmed speed
even at 100% duty cycle (see
error condition has been removed.
Bit 2 - DRIVE_FAIL3 - Indicates that Fan 3 cannot reach its programmed fan speed even at 100% duty
cycle. This may be due to an aging fan or invalid programming.
Bit 1 - DRIVE_FAIL2 - Indicates that Fan 2 cannot reach its programmed fan speed even at 100% duty
cycle. This may be due to an aging fan or invalid programming.
Bit 0 - DRIVE_FAIL1 - Indicates that Fan 1 cannot reach its programmed fan speed even at 100% duty
cycle. This may be due to an aging fan or invalid programming.
The Fan Interrupt Enable controls the masking for each Fan channel. When a channel is enabled, it
will cause the ALERT# pin to be asserted when an error condition is detected.
Bit 2 - FAN3_INT_EN - Allows Fan 3 to assert the ALERT# pin if an error is detected.
Bit 1 - FAN2_INT_EN - Allows Fan 2 to assert the ALERT# pin if an error is detected.
Bit 0 - FAN1_INT_EN - Allows Fan 1 to assert the ALERT# pin if an error condition is detected.
Fan Interrupt Enable Register
4.4.1). All bits are cleared upon a read if the error condition has been removed.
B7
-
Table 5.4 Fan Interrupt Enable Register
B6
-
Section 4.4.2
B5
DATASHEET
-
30
and
B4
-
Section
Multiple RPM-Based PWM Fan Controller for Three Fans
B3
5.12). All bits are cleared upon a read if the
-
INT_EN
FAN3_
B2
INT_EN
FAN2_
B1
Section
SMSC EMC2303
4.6). All bits
INT_EN
FAN1_
Datasheet
B0
DEFAULT
00h

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