PIC16LF1823-I/ML Microchip Technology, PIC16LF1823-I/ML Datasheet - Page 128
PIC16LF1823-I/ML
Manufacturer Part Number
PIC16LF1823-I/ML
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, N
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1823-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1823-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC12F/LF1822/PIC16F/LF1823
REGISTER 12-7:
REGISTER 12-8:
REGISTER 12-9:
DS41413B-page 128
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
U-0
U-0
U-0
—
—
—
Writes to PORTC are actually written to corresponding LATC register. Reads from PORTC register is
return of actual I/O pin values.
Unimplemented: Read as ‘0’
RC<5:0>: PORTC General Purpose I/O Pin bits
1 = Port pin is > V
0 = Port pin is < V
Unimplemented: Read as ‘0’
TRISC<5:0>: PORTC Tri-State Control bits
1 = PORTC pin configured as an input (tri-stated)
0 = PORTC pin configured as an output
Unimplemented: Read as ‘0’
LATC<5:0>: PORTC Output Latch Value bits
U-0
U-0
U-0
—
—
—
PORTC: PORTC REGISTER
TRISC: PORTC TRI-STATE REGISTER
LATC: PORTC DATA LATCH REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-x/u
R/W-1/1
TRISC5
R/W-x/u
LATC5
IH
IL
RC5
R/W-1/1
R/W-x/u
TRISC4
R/W-x/u
LATC4
RC4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
R/W-x/u
R/W-1/1
TRISC3
R/W-x/u
LATC3
RC3
R/W-1/1
R/W-x/u
TRISC2
R/W-x/u
LATC2
RC2
2010 Microchip Technology Inc.
R/W-x/u
R/W-1/1
TRISC1
R/W-x/u
LATC1
RC1
R/W-1/1
R/W-x/u
TRISC0
R/W-x/u
LATC0
RC0
bit 0
bit 0
bit 0
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