PIC16LF1823-I/ST Microchip Technology, PIC16LF1823-I/ST Datasheet - Page 222
PIC16LF1823-I/ST
Manufacturer Part Number
PIC16LF1823-I/ST
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, N
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1823-I/ST
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF1823-I/ST
Manufacturer:
MICROCHIP
Quantity:
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PIC12F/LF1822/PIC16F/LF1823
24.4.5
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current (shoot-
through current) will flow through both power switches,
shorting the bridge supply. To avoid this potentially
destructive shoot-through current from flowing during
switching, turning on either of the power switches is
normally delayed to allow the other switch to
completely turn off.
In Half-Bridge mode, a digitally programmable dead-
band delay is available to avoid shoot-through current
from destroying the bridge power switches. The delay
occurs at the signal transition from the non-active state
to the active state. See
The lower seven bits of the associated PWM1CON
register
of microcontroller instruction cycles (T
FIGURE 24-17:
DS41413B-page 222
Standard Half-Bridge Circuit (“Push-Pull”)
(Register
PROGRAMMABLE DEAD-BAND
DELAY MODE
24-3) sets the delay period in terms
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Figure 24-16
CY
for illustration.
or 4 T
P1A
P1B
OSC
).
Preliminary
FET
Driver
FET
Driver
FIGURE 24-16:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
(1)
2: Output signals are shown as active-high.
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
2010 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)
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