PIC16LF1827-E/MV Microchip Technology, PIC16LF1827-E/MV Datasheet - Page 217
PIC16LF1827-E/MV
Manufacturer Part Number
PIC16LF1827-E/MV
Description
7 KB Flash, 384 Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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23.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCPx/PxA pin, while the complementary PWM
output signal is output on the PxB pin (see
Figure 23-9). This mode can be used for Half-Bridge
applications, as shown in Figure 23-9, or for Full-Bridge
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
Half-Bridge power devices. The value of the PDC<6:0>
bits of the PWMxCON register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 23.4.5 “Programmable Dead-Band Delay
Mode” for more details of the dead-band delay
operations.
FIGURE 23-9:
2010 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
HALF-BRIDGE MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
PxA
PxB
PxA
PxB
FET
Driver
FET
Driver
Preliminary
FET
Driver
FET
Driver
Since the PxA and PxB outputs are multiplexed with the
PORT data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
FIGURE 23-8:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMRx register is equal to the
Load
V+
(2)
(2)
PIC16F/LF1826/27
2: Output signals are shown as active-high.
(1)
td
PRx register.
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
+
-
+
-
(1)
DS41391C-page 217
Period
(1)
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