PIC18F26J13-I/SP Microchip Technology, PIC18F26J13-I/SP Datasheet - Page 144
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PIC18F26J13-I/SP
Manufacturer Part Number
PIC18F26J13-I/SP
Description
28-pin, GP, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SPDIP .300
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F26J13-ISS.pdf
(496 pages)
2.PIC18F26J13-ISS.pdf
(558 pages)
3.PIC18F26J13-ISS.pdf
(12 pages)
Specifications of PIC18F26J13-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (5Mb)
PIC18(L)F2X/4XK22
TABLE 10-8:
DS41412D-page 144
RC5/SDO1/AN17
RC6/P3A/CCP3/TX1/
CK1/AN18
RC7/P3B/RX1/DT1/
AN19
Legend:
Note 1:
Pin Name
2:
3:
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
Function on PORTD and PORTE for PIC18(L)F4XK22 devices.
PORTC I/O SUMMARY (CONTINUED)
CCP3
Function
P3A
SDO1
AN17
AN18
AN19
RC5
RC6
CK1
RC7
P3B
RX1
DT1
TX1
(2), (3)
(2), (3)
Setting
TRIS
0
1
0
1
0
1
0
0
1
1
1
1
1
0
1
0
1
1
1
1
ANSEL
setting
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
Preliminary
Type
Pin
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
CMOS Enhanced CCP3 PWM output 1.
CMOS Enhanced CCP3 PWM output 2.
Buffer
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
AN
AN
AN
ST
ST
ST
ST
ST
ST
ST
LATC<5> data output; not affected by analog input.
PORTC<5> data input; disabled when analog input
enabled.
MSSP1 SPI data output.
Analog input 17.
LATC<6> data output; not affected by analog input.
PORTC<6> data input; disabled when analog input
enabled.
Compare 3 output/PWM 3 output.
Capture 3 input.
EUSART 1 asynchronous transmit data output.
EUSART 1 synchronous serial clock output.
EUSART 1 synchronous serial clock input.
Analog input 18.
LATC<7> data output; not affected by analog input.
PORTC<7> data input; disabled when analog input
enabled.
EUSART 1 asynchronous receive data in.
EUSART 1 synchronous serial data output.
EUSART 1 synchronous serial data input.
Analog input 19.
2
C
TM
=
2010 Microchip Technology Inc.
Description
Schmitt Trigger input with I
2
C.
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