PIC18F26J13-I/SP Microchip Technology, PIC18F26J13-I/SP Datasheet - Page 253
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F26J13-I/SP
Manufacturer Part Number
PIC18F26J13-I/SP
Description
28-pin, GP, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SPDIP .300
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F26J13-ISS.pdf
(496 pages)
2.PIC18F26J13-ISS.pdf
(558 pages)
3.PIC18F26J13-ISS.pdf
(12 pages)
Specifications of PIC18F26J13-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 253 of 496
- Download datasheet (5Mb)
TABLE 15-3:
2010 Microchip Technology Inc.
ANSELA
ANSELB
ANSELC
ANSELD
INTCON
IPR1
IPR2
IPR3
PIE1
PIE2
PIE3
PIR1
PIR2
PIR3
PMD1
SSP1ADD
SSP1BUF
SSP1CON1
SSP1CON2
SSP1CON3
SSP1MSK
SSP1STAT
SSP2ADD
SSP2BUF
SSP2CON1
SSP2CON2
SSP2CON3
SSP2MSK
SSP2STAT
TRISB
TRISC
TRISD
Legend:
Note 1:
Name
2:
Shaded bits are not used by the MSSPx in I
PIC18(L)F2XK22 devices.
PIC18(L)F4XK22 devices.
SSP1 Address Register in I
SSP2 Address Register in I
MSSP2MD
GIE/GIEH
ACKTIM
ACKTIM
OSCFIP
OSCFIE
OSCFIF
SSP2IP
SSP2IE
SSP2IF
TRISB7
TRISC7
TRISD7
ANSC7
ANSD7
WCOL
GCEN
WCOL
GCEN
Bit 7
SMP
SMP
REGISTERS ASSOCIATED WITH I
—
—
—
—
—
MSSP1MD
PEIE/GIEL
ACKSTAT
ACKSTAT
TRISC6
TRISD6
BCL2IP
BCL2IE
BCL2IF
SSPOV
SSPOV
TRISB6
ANSC6
ANSD6
ADIP
C1IP
ADIE
C1IE
ADIF
PCIE
PCIE
Bit 6
C1IF
CKE
CKE
—
—
2
2
TMR0IE
C Slave Mode. SSP1 Baud Rate Reload Register in I
C Slave Mode. SSP2 Baud Rate Reload Register in I
TRISB5
TRISC5
TRISD5
ANSC5
ANSD5
SSPEN
ACKDT
SSPEN
ACKDT
ANSA5
ANSB5
RC1IP
RC2IP
RC1IE
RC2IE
RC1IF
RC2IF
SSP1 Receive Buffer/Transmit Register
SSP2 Receive Buffer/Transmit Register
SCIE
SCIE
C2IP
C2IE
Bit 5
C2IF
D/A
D/A
—
SSP1 MASK Register bits
SSP1 MASK Register bits
CCP5MD CCP4MD
Preliminary
TRISB4
TRISC4
TRISD4
ACKEN
ACKEN
ANSB4
ANSC4
ANSD4
INT0IE
TX1IP
TX2IP
TX1IE
TX2IE
BOEN
BOEN
TX1IF
TX2IF
EEIP
EEIE
EEIF
Bit 4
CKP
CKP
2
—
C mode.
P
P
2
C™ OPERATION
CTMUIP
CTMUIE
CTMUIF
TRISD3
SSP1IP
BCL1IP
SSP1IE
BCL1IE
SSP1IF
TRISB3
TRISC3
ANSA3
ANSB3
ANSC3
ANSD3
BCL1IF
SDAHT
SDAHT
RCEN
RCEN
RBIE
Bit 3
S
S
PIC18(L)F2X/4XK22
TMR5GIP
TMR5GIE
TMR5GIF
CCP3MD
TMR0IF
CCP1IP
CCP1IE
HLVDIP
HLVDIE
CCP1IF
HLVDIF
SBCDE
SBCDE
TRISB2
TRISC2
TRISD2
ANSC2
ANSD2
ANSA2
ANSB2
Bit 2
PEN
PEN
R/W
R/W
SSPM<3:0>
SSPM<3:0>
TRISB1
TRISD1
TMR3GIP
TMR3GIE
TMR3GIF
ANSB1
ANSD1
CCP2MD
TMR2IP
TMR3IP
TMR2IE
TMR3IE
TMR2IF
TMR3IF
TRISC1
ANSA1
INT0IF
RSEN
AHEN
RSEN
AHEN
Bit 1
UA
UA
—
2
2
C Master Mode.
C Master Mode.
(1)
(2)
(1)
(2)
TRISB0
TRISD0
ANSD0
TMR1GIP
TMR1GIE
TMR1GIF
ANSB0
CCP1MD
TMR1IP
CCP2IP
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISC0
ANSA0
DHEN
DHEN
DS41412D-page 253
Bit 0
RBIF
SEN
SEN
BF
BF
—
(1)
(2)
(1)
(2)
Register
on Page
152
153
153
153
127
128
129
123
124
125
120
261
256
258
259
260
255
261
256
258
259
260
255
154
154
154
115
118
119
57
—
—
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