PIC18F26J13-I/SP Microchip Technology, PIC18F26J13-I/SP Datasheet - Page 406
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F26J13-I/SP
Manufacturer Part Number
PIC18F26J13-I/SP
Description
28-pin, GP, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SPDIP .300
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F26J13-ISS.pdf
(496 pages)
2.PIC18F26J13-ISS.pdf
(558 pages)
3.PIC18F26J13-ISS.pdf
(12 pages)
Specifications of PIC18F26J13-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PIC18(L)F2X/4XK22
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
DS41412D-page 406
Table Write
TBLWT ( *; *+; *-; +*)
None
if TBLWT*,
(TABLAT) Holding Register;
TBLPTR – No Change;
if TBLWT*+,
(TABLAT) Holding Register;
(TBLPTR) + 1 TBLPTR;
if TBLWT*-,
(TABLAT) Holding Register;
(TBLPTR) – 1 TBLPTR;
if TBLWT+*,
(TBLPTR) + 1 TBLPTR;
(TABLAT) Holding Register;
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the
8 holding registers the TABLAT is written
to. The holding registers are used to
program the contents of Program
Memory (P.M.). (Refer to
“Flash Program Memory”
details on programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-MByte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
operation
Decode
0000
Q1
No
TBLPTR[0] = 0: Least Significant
TBLPTR[0] = 1: Most Significant
operation
operation
TABLAT)
(Read
0000
Q2
No
No
operation
operation
0000
Byte of Program
Memory Word
Byte of Program
Memory Word
Q3
No
No
Section 6.0
for additional
nn=0 *
Register )
operation
operation
(Write to
Holding
=1 *+
=2 *-
=3 +*
11nn
Q4
No
No
Preliminary
TBLWT
Example1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
(00A356h)
(00A356h)
(01389Ah)
(01389Bh)
(01389Ah)
(01389Bh)
Table Write (Continued)
TBLWT *+;
TBLWT +*;
2010 Microchip Technology Inc.
=
=
=
=
=
=
=
=
=
=
=
=
=
=
55h
00A356h
FFh
55h
00A357h
55h
34h
01389Ah
FFh
FFh
34h
01389Bh
FFh
34h
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