SAF7118EH/V1/G-T NXP Semiconductors, SAF7118EH/V1/G-T Datasheet - Page 138
SAF7118EH/V1/G-T
Manufacturer Part Number
SAF7118EH/V1/G-T
Description
Video ICs 9BIT VIDEO DECODER
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7118EHV1G-T.pdf
(175 pages)
Specifications of SAF7118EH/V1/G-T
Screening Level
Industrial
Package Type
HBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
Other names
SAF7118EH/V1/G,518
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NXP Semiconductors
Table 126. Prescaler DC gain and FIR prefilter control; register set A [A2h[3:0]] and B [D2h[3:0]]
[1]
Table 127. Luminance brightness control; register set A [A4h[7:0]] and B [D4h[7:0]]
Table 128. Luminance contrast control; register set A [A5h[7:0]] and B [D5h[7:0]]
Table 129. Chrominance saturation control; register set A [A6h[7:0]] and B [D6h[7:0]]
SAF7118_4
Product data sheet
Prescaler DC gain
Prescaler output is renormalized by gain factor = 1
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Prescaler output is renormalized by gain factor =
Weighting of all accumulated samples is factor ‘1’;
e.g. XACL = 4
Weighting of samples inside sequence is factor ‘2’;
e.g. XACL = 4
Luminance brightness
control
Value = 0
Nominal value = 128
Value = 255
Luminance contrast control Control bits D7 to D0
Gain = 0
Gain =
Nominal gain = 64
Gain =
Chrominance saturation
control
Gain = 0
Gain =
Nominal gain = 64
Gain =
X = don’t care.
1
127
1
127
64
64
64
64
10.7.10 Subaddresses A4h to A6h
sequence 1 + 1 + 1 + 1 + 1
sequence 1 + 2 + 2 + 2 + 1
Control bits D7 to D0
BRIG7
0
1
1
CONT7
0
0
0
0
Control bits D7 to D0
SATN7
0
0
0
0
BRIG6
0
0
1
CONT6
0
0
1
1
SATN6
0
0
1
1
1
1
1
1
1
1
1
2
4
8
16
32
64
128
Rev. 04 — 4 July 2008
BRIG5
0
0
1
CONT5
0
0
0
1
SATN5
0
0
0
1
Multistandard video decoder with adaptive comb filter
BRIG4
0
0
1
CONT4
0
0
0
1
SATN4
0
0
0
1
Control bits D3 to D0
XC2_1
X
X
X
X
X
X
X
X
0
1
BRIG3
0
0
1
CONT3
0
0
0
1
SATN3
0
0
0
1
XDCG2
0
0
0
0
1
1
1
1
X
X
BRIG2
0
0
1
CONT2
0
0
0
1
SATN2
0
0
0
1
XDCG1
0
0
1
1
0
0
1
1
X
X
BRIG1
0
0
1
CONT1
0
0
0
1
SATN1
0
0
0
1
[1]
SAF7118
© NXP B.V. 2008. All rights reserved.
XDCG0
0
1
0
1
0
1
0
1
X
X
BRIG0
0
0
1
CONT0
0
1
0
1
SATN0
0
1
0
1
138 of 175
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