ADV7342BSTZ Analog Devices Inc, ADV7342BSTZ Datasheet - Page 72

• Manufacturer Part Number: ADV7342BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7342BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 11b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

ADV7342/ADV7343
External filter and buffer components connected to the DAC
outputs should be placed as close as possible to the ADV7342/
ADV7343 to minimize the possibility of noise pickup from
neighboring circuitry and to minimize the effect of trace
capacitance on output bandwidth. This is particularly important
when operating in low-drive mode (R
Power Supplies
It is recommended that a separate regulated supply be provided
for each power domain (V
optimal performance, linear regulators rather than switch mode
regulators should be used. If switch mode regulators must be
used, care must be taken with regard to the quality of the output
voltage in terms of ripple and noise. This is particularly true for
the V
individually connected to the system power supply at a single
point through a suitable filtering device, such as a ferrite bead.
Power Supply Decoupling
It is recommended that each power supply pin be decoupled
with 10 nF and 0.1 μF ceramic capacitors. The V
V
ground. The decoupling capacitors should be placed as close as
possible to the ADV7342/ADV7343 with the capacitor leads
kept as short as possible to minimize lead inductance.
A 1 μF tantalum capacitor is recommended across the V
supply in addition to the 10 nF and 0.1 μF ceramic capacitors.
Power Supply Sequencing
If the ALSB pin is tied low, a power supply sequence is required
for proper operation of the part. The V
DD_IO
AA
, and both V
and PV
DD
power domains. Each power supply should be
DD
pins should be individually decoupled to
AA
, V
DD
, V
SETx
DD_IO
DD_IO
= 4.12 kΩ, R
, and PV
power supply must
AA
DD
, PV
). For
L
= 300 Ω).
DD
AA
,
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be established a minimum of 250 μs prior to the V
supply being established. The V
be established at any time and in any order. Tying ALSB to
V
Digital Signal Interconnect
The digital signal traces should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal traces should not overlay the V
Due to the high clock rates used, avoid long clock traces to the
ADV7342/ADV7343 to minimize noise pickup.
Any pull-up termination resistors for the digital inputs should
be connected to the V
Any unused digital inputs should be tied to ground.
Analog Signal Interconnect
DAC output traces should be treated as transmission lines with
appropriate measures taken to ensure optimal performance (for
example, impedance matched traces). The DAC output traces
should be kept as short as possible. The termination resistors on
the DAC output traces should be placed as close as possible to,
and on the same side of the PCB as, the ADV7342/ADV7343.
To avoid crosstalk between the DAC outputs, it is recom-
mended that as much space as possible be left between the
traces connected to the DAC output pins. Adding ground traces
between the DAC output traces is also recommended.
DD_IO
completely removes this PSS requirement.
DD_IO
power supply.
AA
and PV
AA
or PV
DD
power supplies can
DD
power plane.
DD
power