HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 354
HH80556KH0364M S LAGD
Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet
1.HH80556KH0364M_S_LAGD.pdf
(434 pages)
Specifications of HH80556KH0364M S LAGD
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
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Figure 43.
Figure 44.
5.20.5
Intel
Datasheet
354
®
5100 Memory Controller Hub Chipset
DWORD Memory Read Protocol (SMBus Word Write/Word Read, PEC Disabled)
WORD Configuration Write Protocol (SMBus Byte Write, PEC Disabled)
Slave SMBus, SMBus 0
System Management software in a Intel
management accesses to the configuration registers via the Slave SMBus, SMBus 0.
The mechanism for the Server Management (SM) software to access configuration
registers is through a System Management Bus (SMBus) Specification, Version 2.0
compliant slave port. Some Intel
port and allow accesses to their configuration registers. The product specific details are
compatible with the ICH9R SMBus configuration access mechanism. Most of the Intel
5100 MCH Chipset registers can be accessed through the SMBus configuration
mechanism.
SMBus operations are made up of two major steps:
The following sections will describe the protocol for an SMBus master to access a Intel
5100 MCH Chipset component’s internal configuration registers. Refer to the System
Management Bus (SMBus) Specification, Version 2.0 for the bus protocol, timings, and
waveforms.
1. Writing information to registers within each component
2. Reading configuration registers from each component
S
S
Sr
S
Sr
Sr
S
S
S
S
S
S
S
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
0110_000
W A
W A
R A
W A
R A
W A
R A
W A
W A
W A
W A
W A
W A
Cmd = 10100001
Cmd = 00100001
Cmd = 01100001
Cmd = 01100000
Data[23:16]
Status
Data[7:0]
Cmd = 10001000
Cmd = 00001000
Cmd = 00001000
Cmd = 00001000
Cmd = 00001000
Cmd = 01001000
®
5100 MCH Chipset components contain this slave
A
A
A
A
A
A
N
P
®
Add Offset[15:8]
5100 MCH Chipset can initiate system
Data[31:24]
Data[15:8]
Intel
A
A
A
A
A
A
®
5100 MCH Chipset—Functional Description
Register Num[15:8]
Register Num[7:0]
Device/Function
Bus Number
N P
N P
Data[W:X]
A
Data[Y:Z]
Add Offset[7:0]
Order Number: 318378-005US
A P
A P
A P
A P
A P
CLOCK STRETCH
CLOCK STRETCH
July 2009
A P
A P
®
®
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