PF38F2030W0YWA Micron Technology Inc, PF38F2030W0YWA Datasheet - Page 46
PF38F2030W0YWA
Manufacturer Part Number
PF38F2030W0YWA
Description
Manufacturer
Micron Technology Inc
Datasheet
1.PF38F2030W0YWA.pdf
(102 pages)
Specifications of PF38F2030W0YWA
Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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8.0
8.1
8.2
8.3
8.4
8.4.1
Datasheet
46
Power and Reset Specifications
Numonyx™ Wireless Flash Memory (W18) devices have a layered approach to power
savings that can significantly reduce overall system power consumption. The APS
feature reduces power consumption when the device is selected but idle. If CE# is
deasserted, the memory enters its standby mode, where current consumption is even
lower. Asserting RST# provides current savings similar to standby mode. The
combination of these features can minimize memory power consumption, and
therefore, overall system power consumption.
Active Power
With CE# at V
“DC Current Characteristics” on page
state, it consumes the most power from the system. Minimizing device active current
therefore reduces system power consumption, especially in battery-powered
applications.
Automatic Power Savings (APS)
Automatic Power Saving (APS) provides low-power operation during a read’s active
state. During APS mode, I
interval 5 µs after the following events happen:
OE# may be asserted during APS.
Standby Power
With CE# at V
which disables most device circuitry and substantially reduces power consumption.
Outputs are placed in a high-impedance state independent of the OE# signal state. If
CE# transitions to V
operation and consumes corresponding active power until the operation is complete.
I
assertion.
Power-Up/Down Characteristics
The device is protected against accidental block erasure or programming during power
transitions. Power supply sequencing is not required if V
connected together; so it doesn’t matter whether V
and/or V
before applying VCCQ and VPP. Device inputs should not be driven before supply
voltage = V
System Reset and RST#
The use of RST# during system reset is important with automated program/erase
devices because the system expects to read from the flash memory when it comes out
of reset. If a CPU reset occurs without a flash memory reset, proper CPU initialization
CCS
• There is no internal sense activity;
• CE# is asserted;
• The address lines are quiescent, and at V
is the average current measured over any 5 ms time interval 5 µs after a CE# de-
PP
are not connected to the system supply, then V
CCMIN.
IL
IH
and RST# at V
and the device in read mode, the flash memory is in standby mode,
Power supply transitions should only occur when RST# is low.
IH
during erase or program operations, the device continues the
CCAPS
IH
is the average current measured over any 5 ms time
, the device is in the active mode. Refer to
23, for I
SSQ
CC
values. When the device is in “active”
or V
Numonyx™ Wireless Flash Memory (W18)
Numonyx™ Wireless Flash Memory (W18)
PP
CCQ
or V
.
CC
CC
, V
CC
CCQ
powers-up first. If V
should attain V
, and V
Order Number: 290701-18
PP
are
Section 6.1,
November 2007
CCMIN
CCQ
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