NH82801HBM S LA5Q Intel, NH82801HBM S LA5Q Datasheet - Page 4

• Manufacturer Part Number: NH82801HBM S LA5Q
• Manufacturer: Intel

Specifications of NH82801HBM S LA5Q

• Lead Free Status / RoHS Status: Compliant

Revision History
Intel
Revision
NDA
-001
-002
-003
-004
-005
-006
-007
-008
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ICH8 Family Specification Update
• Added Items:
• Errata: 12-ICH8 UHCI Hang with USB Reset, 13-ICH8 Thermal Sensor Temperature
• Document Changes: 21-Write Combining Correction, 22-GPIO_USE_SEL Registers
• Initial Release
• Added 82801HH ICH8DH and 82801HO ICH8DO.
• Added Items:
• Errata: 5-Intel
• Added Items:
• Errata: 7-Intel
• Specification Clarifications: 1-Thermal Sensors Functionality Clarification, 2-Internal
• Document Changes: 2-Thermal Sensors Register Change
• Added Items:
• Errata: 9-Intel
• Specification Changes: 1-t294 Timing Change, 2-Power Plane Table Change, 3-t313
• Specification Clarifications: 3-ICH8 ME Soft Strap Clarification, 4-MCH ME Soft Strap
• Document Changes: 3-Device 31 Interrupt Pin Register Change, 4-Device 30 Interrupt
• Added Items:
• Errata: 10-ICH8 PCI Express* Endpoint L0/L1 Acceptable Latency Bits
• Specification Changes: 4-t294 Timing Change and t307 Addition
• Document Changes: 12-t294 Timing Change and t307 Addition, 13-AHCI Support
• Added Items:
• Errata: 11-ICH8 USB K-State Reflection on Resume
• Document Changes: 14-Pull-Up on GPIO[33], 15-WOL_EN Signal Description
• Modified Specification #4: Removed RSMRST# from Figure 30.
• Modified Document Change #8: Removed RSMRST# from Figure 36
APM Wakeup After G3
Upstream Link Base Address Register Bit 0
Voltage Regulator Usage Clarification
Timing Addition
Clarification, 5-Functional Strap Clarification, 6-Boot BIOS Strap Register Clarification, 7-
PCI Express* Strapping Clarification, 8-PCI Express* Overview Clarification, 9-Signal
Description Clarifications, 10-Host Power Cycle Clarification, 11-SATA Register
Clarifications, 12-SYNC Field Clarification
Pin Register Change, 5-Device 26 Interrupt Route Register Change, 6-Device 25
Interrupt Route Register Change, 7-Root Port Configuration Register Change, 8-Timing
Diagram Updates, 9-SPI Register Change, 10-Timer Configuration and Capabilities
Register Change, 11-RTC Update Cycle Inhibit (SET) Bit Correction
Clarification
Clarification, 16-Flash Region (FLREG) Registers Clarification, 17-Interrupt Mapping
Clarification, 18-8259 Interrupt Controller Clarification, 19-APIC Enable (AEN) Bit
Clarification, 20-Reset Control Register (CF9h) Clarification
Reading
Correction, 23- PWROK Glitch-free Clarification
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ICH8 PCI Express* Root Port Power State Value, 6-Intel
ICH8 Integrated LAN DMA Error, 8-Intel
ICH8 Simple Serial Transport (SST) TH0 and TH1Timing
Description
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ICH8 ICH8 PCI Express*
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ICH8 LAN
June 2006
July 2006
August 2006
September 2006
November 2006
December 2006
February 2007
March 2007
Date
4