ISP1583BS STEricsson, ISP1583BS Datasheet - Page 62

• Manufacturer Part Number: ISP1583BS
• Manufacturer: STEricsson

Specifications of ISP1583BS

• Lead Free Status / RoHS Status: Compliant

Table 86.
Table 88.
ISP1583_10
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Scratch register: bit allocation
Frame Number register: bit allocation
9.5.3 Frame Number register (address: 74h)
9.5.4 Scratch register (address: 78h)
R/W
R/W
15
0
0
7
0
0
15
R
7
0
0
-
-
-
Table 85.
This read-only register contains the frame number of the last successfully received
Start-Of-Frame (SOF). The register contains 2 bytes, and the bit allocation is given in
Table
reserved
Table 87.
This 16-bit register can be used by the firmware to save and restore information. For
example, the device status before it enters the suspend state. The bit allocation is given in
Table
Bit
23 to 16
15 to 8
7 to 0
Bit
15 to 14
13 to 11
10 to 0
86. In case of 8-bit access, the register content is returned lower byte first.
88.
R/W
R/W
14
0
0
6
0
0
14
R
6
0
0
-
-
-
Chip ID register: bit description
Frame Number register: bit description
Symbol
CHIPID[15:8]
CHIPID[7:0]
VERSION[7:0]
Symbol
-
MICROSOF[2:0]
SOFR[10:0]
R/W
R/W
13
0
0
5
0
0
13
R
R
0
0
5
0
0
Rev. 10 — 23 June 2009
MICROSOF[2:0]
Description
Chip ID: lower byte (15h)
Chip ID: upper byte (82h)
Version: version number (30h)
R/W
R/W
Description
reserved
microframe number
frame number
12
0
0
4
0
0
12
R
R
0
0
4
0
0
SFIRH[7:0]
SFIRL[7:0]
SOFR[7:0]
R/W
R/W
11
0
0
3
0
0
11
R
R
0
0
3
0
0
Hi-Speed USB peripheral controller
R/W
R/W
10
0
0
2
0
0
10
R
R
0
0
2
0
0
SOFR[10:8]
© ST-ERICSSON 2009. All rights reserved.
R/W
R/W
9
0
0
1
0
0
R
R
9
0
0
1
0
0
ISP1583
R/W
R/W
R
R
8
0
0
0
0
0
8
0
0
0
0
0
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