MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 127
MC908AP32CFBE
Manufacturer Part Number
MC908AP32CFBE
Description
Manufacturer
Freescale
Datasheet
1.MC908AP32CFBE.pdf
(324 pages)
Specifications of MC908AP32CFBE
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant
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During the software execution, it does not consume any dedicated RAM location, the run-time heap will
extend the system stack, all other RAM location will not be affected.
The control and data bytes are described below.
8.5.1 PRGRNGE
PRGRNGE is used to program a range of FLASH locations with data loaded into the data array.
Freescale Semiconductor
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Bus speed — This one byte indicates the operating bus speed of the MCU. The value of this byte
should be equal to 4 times the bus speed. E.g., for a 4MHz bus, the value is 16 ($10). This control
byte is useful where the MCU clock source is switched between the PLL clock and the crystal clock.
Data size — This one byte indicates the number of bytes in the data array that are to be
manipulated. The maximum data array size is 255. Routines EE_WRITE and EE_READ are
restricted to manipulate a data array between 7 to 15 bytes. Whereas routines ERARNGE and
MON_ERARNGE do not manipulate a data array, thus, this data size byte has no meaning.
Start address — These two bytes, high byte followed by low byte, indicate the start address of the
FLASH memory to be manipulated.
Data array — This data array contains data that are to be manipulated. Data in this array are
programmed to FLASH memory by the programming routines: PRGRNGE, MON_PRGRNGE,
EE_WRITE. For the read routines: LDRNGE and EE_READ, data is read from FLASH and stored
in this array.
Routine Description
Data Block Format
Calling Address
ADDRESS AS POINTER
FILE_PTR
Figure 8-9. Data Block Format for ROM-Resident Routines
Routine Name
Stack Used
ARRAY
DATA
MC68HC908AP Family Data Sheet, Rev. 4
Table 8-11. PRGRNGE Routine
$XXXX
PRGRNGE
Program a range of locations
$FC34
15 bytes
Bus speed (BUS_SPD)
Data size (DATASIZE)
Start address high (ADDRH)
Start address (ADDRL)
Data 1 (DATA1)
Data N (DATAN)
:
START ADDRESS HIGH (ADDRH)
START ADDRESS LOW (ADDRL)
BUS SPEED (BUS_SPD)
DATA SIZE (DATASIZE)
R
DATA N
DATA 0
DATA 1
A
M
BLOCK
DATA
ROM-Resident Routines
127
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