MT47H32M8BP-5E IT:B TR Micron Technology Inc, MT47H32M8BP-5E IT:B TR Datasheet - Page 51
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MT47H32M8BP-5E IT:B TR
Manufacturer Part Number
MT47H32M8BP-5E IT:B TR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M8BP-5E_ITB_TR.pdf
(128 pages)
Specifications of MT47H32M8BP-5E IT:B TR
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
600ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
125mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
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Input Slew Rate Derating
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
For all input signals, the total
by adding the data sheet
value, respectively. Example:
t
crossing of V
a falling signal is defined as the slew rate between the last crossing of V
first crossing of V
If the actual signal is always earlier than the nominal slew rate line between shaded
“V
(page 54)).
If the actual signal is later than the nominal slew rate line anywhere between the sha-
ded “V
AC level to DC level is used for the derating value (see Figure 23 (page 54)).
t
crossing of V
ing signal, is defined as the slew rate between the last crossing of V
crossing of V
If the actual signal is always later than the nominal slew rate line between shaded “DC
to V
(page 55)).
If the actual signal is earlier than the nominal slew rate line anywhere between shaded
“DC to V
level to V
Although the total setup time might be negative for slow slew rates (a valid input signal
will not have reached V
input signal is still required to complete the transition and reach V
For slew rates in between the values listed in Table 28 (page 52) and Table 29
(page 53), the derating values may obtained by linear interpolation.
IS, the nominal slew rate for a rising signal, is defined as the slew rate between the last
IH, the nominal slew rate for a rising signal, is defined as the slew rate between the last
REF(DC)
REF(DC)
REF(DC)
REF(DC)
REF(DC)
to AC region,” use the nominal slew rate for the derating value (Figure 22
region,” use the nominal slew rate for the derating value (Figure 24
REF(DC)
IL(DC)max
REF(DC)
to AC region,” the slew rate of a tangent line to the actual signal from the
region,” the slew rate of a tangent line to the actual signal from the DC
level is used for the derating value (Figure 25 (page 55)).
IL(AC)max
.
and the first crossing of V
and the first crossing of V
IH[AC]
t
.
IS (base) and
/V
t
51
t
IS (total setup time) =
IS (setup time) and
IL[AC]
at the time of the rising clock transition), a valid
t
Micron Technology, Inc. reserves the right to change products or specifications without notice.
IH (base) value to the Δ
256Mb: x4, x8, x16 DDR2 SDRAM
IH(AC)min
REF(DC)
t
IH (hold time) required is calculated
t
IS (base) + Δ
Input Slew Rate Derating
. Setup nominal slew rate (
.
t
IH, nominal slew rate for a fall-
©2003 Micron Technology, Inc. All rights reserved.
t
IS and Δ
t
IS.
IH(AC)
IH(DC)min
REF(DC)
/V
t
IH derating
IL(AC)
and the first
and the
.
t
IS) for
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