LC5512MV-75F256C LATTICE SEMICONDUCTOR, LC5512MV-75F256C Datasheet - Page 33
LC5512MV-75F256C
Manufacturer Part Number
LC5512MV-75F256C
Description
CPLD ispXPLD™ 5000MV Family 150K Gates 512 Macro Cells 150MHz EECMOS Technology 3.3V 256-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LC5512MV-75FN256C.pdf
(99 pages)
Specifications of LC5512MV-75F256C
Package
256FBGA
Family Name
ispXPLDÂ 5000MV
Device System Gates
150000
Number Of Macro Cells
512
Maximum Propagation Delay Time
7.5 ns
Number Of User I/os
193
Typical Operating Supply Voltage
3.3 V
Maximum Operating Frequency
150 MHz
Number Of Product Terms Per Macro
160
Ram Bits
262144
Memory Type
EEPROM/SRAM
Operating Temperature
0 to 90 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC5512MV-75F256C
Manufacturer:
LATTICE
Quantity:
190
Company:
Part Number:
LC5512MV-75F256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LC5512MV-75F256C
Manufacturer:
LATTICE/莱迪斯
Quantity:
20 000
ispXPLD 5000MX Family External Switching Characteristics
Lattice Semiconductor
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
f
f
f
f
PD
PD_PTSA
S
S_PTSA
SIR
H
H_PTSA
HIR
CO
R
RW
LPTOE/DIS
SPTOE/DIS
GOE/DIS
CW
GW
WIR
SKEW
MAX
MAX
MAX
MAX
MAX
Parameter
4
(Ext.)
(Tog.)
(CAMC)
(CAM)
5
5
Data Propagation Delay,
5-PT Bypass
Data propagation delay
MFB Register Setup Time
Before Clock, 5-PT Bypass
MFB Register Setup Time
Before Clock
MFB Register Setup Time
Before Clock, Input Register
Path
MFB Register Hold Time
Before Clock, 5-PT Bypass
MFB Register Hold Time
Before Clock
MFB Register Hold Time
Before Clock, Input Register
Path
MFB Register Clock-to-Out-
put Delay
External Reset Pin to Output
Delay
Reset Pulse Duration
Input to Output Local Product
Term Output Enable/Disable
Input to Output Shared
Product Term Output Enable/
Disable
Global OE Input to Output
Enable/Disable
Clock Width, High or Low
Gate Width Low (for Low
Transparent) or High (for
High Transparent)
Input Register Clock Width,
High or Low
Clock-to-Out Skew, Block
Level
Clock Frequency with
Internal Feedback
Clock Frequency with
External Feedback,
1/ (t
Clock Frequency Max.
Toggle
Clock Frequency to CAM
(Configure Mode)
Clock Frequency to CAM
(Compare Mode)
S
+ t
CO
Description
)
Over Recommended Operating Conditions
Min.
2.2
2.5
1.0
0.0
0.0
0.5
1.8
1.5
1.5
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
-4
Max.
300
200
333
280
150
4.0
2.8
4.0
6.0
6.0
4.5
0.6
4.8
—
—
—
—
—
—
—
—
—
—
29
Min.
2.8
3.1
1.0
0.0
0.0
0.5
1.8
1.5
1.5
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
-45
Max.
275
171
333
280
150
4.5
5.7
3.0
4.5
7.0
7.0
5.5
0.6
—
—
—
—
—
—
—
—
—
—
ispXPLD 5000MX Family Data Sheet
Min.
2.8
3.1
1.0
0.0
0.0
0.5
1.8
1.5
1.5
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
-5
Max.
250
166
333
230
150
5.0
6.0
3.2
5.0
7.5
7.5
5.5
0.6
—
—
—
—
—
—
—
—
—
—
Min.
3.0
3.6
0.5
0.0
0.0
1.0
2.0
1.8
1.8
1.8
—
—
—
—
—
—
—
—
—
—
—
—
—
-52
Max.
250
149
277
230
135
5.2
3.7
5.0
8.5
8.5
6.5
0.6
6.5
—
—
—
—
—
—
—
—
—
—
1, 2, 3
Min.
4.5
5.5
1.7
0.0
0.0
1.3
3.0
2.5
2.5
2.5
—
—
—
—
—
—
—
—
—
—
—
—
—
-75
Max.
10.5
10.5
150
105
200
168
7.5
9.5
5.0
7.5
7.5
1.0
90
—
—
—
—
—
—
—
—
—
—
Units
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns