AD9244BSTZ-65 Analog Devices Inc, AD9244BSTZ-65 Datasheet
AD9244BSTZ-65
Specifications of AD9244BSTZ-65
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AD9244BSTZ-65 Summary of contents
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FEATURES 14-bit, 40 MSPS/65 MSPS ADC Low power 550 MSPS 300 MSPS On-chip reference and sample-and-hold 750 MHz analog input bandwidth SNR > 73 dBc to Nyquist @ 65 MSPS SFDR > 86 dBc ...
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AD9244 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 DC Specifications ......................................................................... 3 AC Specifications.......................................................................... 4 Digital Specifications ................................................................... 5 Switching ...
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SPECIFICATIONS DC SPECIFICATIONS AVDD = 5 V, DRVDD = MSPS (–65 MSPS (–40), differential clock inputs, VREF = 2 V, external reference, SAMPLE differential analog inputs, unless otherwise noted. Table 1. Parameter RESOLUTION ...
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AD9244 AC SPECIFICATIONS AVDD = 5 V, DRVDD = MSPS (–65 MSPS (–40), differential clock inputs, VREF = 2 V, external reference, SAMPLE A = –0.5 dBFS, differential analog inputs, unless otherwise noted. ...
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Parameter 1 WORST HARMONIC (SECOND or THIRD 2.4 MHz MHz 32.5 MHz MHz 100 MHz 200 MHz IN 1 SFDR f ...
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AD9244 Parameter 2 DIGITAL OUTPUTS (DRVDD = 3 V) Logic 1 Voltage ( μA) OH Logic 0 Voltage ( μA) OL Logic 1 Voltage (I = 0.5 mA) OH Logic 0 Voltage (I = 1.6 mA) ...
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ABSOLUTE MAXIMUM RATINGS Table 5. With Parameter Respect to Rating ELECTRICAL AVDD AGND –0 +6.5 V DRVDD DGND −0 +6.5 V AGND DGND –0 +0.3 V AVDD DRVDD –6 +6.5 V REFGND ...
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AD9244 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. Pin Function Descriptions Pin No. Mnemonic 32, 33 AGND 3, 4, 31, 34 AVDD 6, 7 CLK–, CLK NIC 9 OEB 10 D0 (LSB 13, ...
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TERMINOLOGY Analog Bandwidth (Full Power Bandwidth) The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the ...
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AD9244 Spurious-Free Dynamic Range (SFDR) The difference in dB between the rms amplitude of the input signal and the peak spurious signal. Temperature Drift The temperature drift for offset error and gain error specifies the maximum change from initial (25°C) ...
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TYPICAL APPLICATION CIRCUITS DRVDD DRVDD DGND Figure D13, OTR DRVDD 200Ω DGND Figure 5. Three-State (OEB) AVDD 200Ω CLK BUFFER AGND Figure 6. CLK+, CLK− AVDD AGND Figure 7. VIN+, VIN− Figure 8. DFS, DCS, SENSE Figure ...
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AD9244 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 5.0 V, DRVDD = 3 SAMPLE mode voltage ( 2.5 V, input amplitude ( –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) Figure ...
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SPAN 69 1V SPAN 100 INPUT FREQUENCY (MHz) Figure 16. SINAD/ENOB vs. Input Frequency –100 –95 –90 –85 –80 2V SPAN – 100 INPUT ...
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AD9244 –100 FOURTH HARMONIC –95 THIRD HARMONIC –90 –85 –80 – INPUT FREQUENCY (MHz) Figure 22. Harmonics vs. Input Frequency 10MHz 20MHz ...
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SFDR = 93.2dBc –20 –40 –60 –80 –100 –120 0 5.0 10.0 15.0 20.0 25.0 FREQUENCY (MHz) Figure 28. Dual-Tone FFT with f = 44.2 MHz and IN− 45.6 MHz ( –6.5 dBFS) IN−2 ...
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AD9244 0 –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) Figure 34. Dual-Tone with f = 239.1 MHz and IN− 240.7 MHz ( IN−2 IN−1 IN−2 0 –10 –20 –30 –40 ...
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THEORY OF OPERATION The AD9244 is a high performance, single-supply 14-bit ADC. In addition to high dynamic range Nyquist sampling designed for excellent IF undersampling performance with an analog input as high as 240 MHz. The AD9244 uses ...
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AD9244 A differential input structure allows the user to easily configure the inputs for either single-ended or differential operation. The ADC’s input structure allows the dc offset of the input signal to be varied independent of the input span of ...
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The optimum noise and dc linearity performance for either differential or single-ended inputs is achieved with the largest input signal voltage span (that is input span) and matched input impedance for VIN+ and VIN–. Only a slight degradation ...
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AD9244 The circuit in Figure 47 shows a method for applying a differential, direct-coupled signal to the AD9244. An AD8138 amplifier is used to derive a differential signal from a single-ended signal. 10 μ 0.1 μ ...
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Using an External Reference To use an external reference, the internal reference must be dis- abled by connecting the SENSE pin to AVDD. The AD9244 contains an internal reference buffer, A2 (see Figure 48), that simplifies the drive requirements of ...
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AD9244 Out of Range (OTR) An out-of-range condition exists when the analog input voltage is beyond the input range of the ADC. OTR is a digital output that is updated along with the data output corresponding to the particular sampled ...
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Clock Input Modes Figure 55 to Figure 59 illustrate the modes of operation of the clock receiver. Figure 55 shows a differential clock directly coupled to CLK+ and CLK–. In this mode, the common mode of the CLK+ and CLK– ...
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AD9244 Clock Stabilizer (DCS) The clock stabilizer circuit in the AD9244 desensitizes the ADC from clock duty cycle variations. System clock constraints are eased by internally restoring the clock duty cycle to 50%, independent of the clock input duty cycle. ...
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Reference Decoupling The VREF pin should be bypassed to the REFGND pin with a 10 μF tantalum capacitor in parallel with a low inductance 0.1 μF ceramic capacitor also necessary to add a capacitor network to decouple the ...
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AD9244 EVALUATION BOARD ANALOG INPUT CONFIGURATION Table 12 provides a summary of the analog input configuration. The analog inputs of the AD9244 on the evaluation board can be driven differentially through a transformer via Connector S4, or through the AD8138 ...
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Table 14. Clock Jumper Configuration Clock Input DUT CLOCK Differential Single-Ended AD9226-Compatible DATA CAPTURE CLOCK Internal Differential DUT Clock Single-Ended DUT Clock External SIGNAL SYNTHESIZER REFIN 2.5MHz, 0.8V p-p CLK SYNTHESIZER 10MHz 65MHz, 1V p-p REFOUT Input Connector S5 S1 ...
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AD9244 CW Figure 65. AD9244 Evaluation Board, ADC, External Reference, and Power Supply Circuitry Rev Page ...
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EJECTORS NO MALE ANGLE RIGHT HEADER Figure 66. AD9244 Evaluation Board, Clock Input, and Digital Output Buffer Circuitry Rev Page AD9244 ...
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AD9244 AVDD R37 499Ω –IN R34 U2 523Ω AD8138 AMP INPUT 8 S2 +IN R35 V– 499Ω R31 6 49.9Ω 499Ω JP5 R40 SINGLE 1kΩ INPUT R41 49.9Ω 0.33μF 1kΩ C15 10μF AVDD 10V ...
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Figure 68. AD9244 Evaluation Board, PCB Assembly, Top Figure 69. AD9244 Evaluation Board, PCB Assembly, Bottom Rev Page AD9244 ...
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AD9244 Figure 70. AD9244 Evaluation Board, PCB Layer 1 (Top) Figure 71. AD9244 Evaluation Board, PCB Layer 2 (Ground Plane) Rev Page ...
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Figure 72. AD9244 Evaluation Board, PCB Layer 3 (Power Plane) Figure 73. AD9244 Evaluation Board, PCB Layer 4 (Bottom) Rev Page AD9244 ...
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AD9244 Table 15. Evaluation Board Bill of Materials Item Qty. Reference Designator 1 11 C1, C3, C4, C5, C15, C20, C21, C22, C23, C26, C27 2 28 C2, C7, C8, C10, C11, C12, C13, C14, C16, C17, C18, C19, C28, ...
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Item Qty. Reference Designator 50 14 Sockets for through resistors 51 2 C56, C57 Total 183 1 Do not place. Description Solder sockets Rev Page AD9244 Package Value 1 DNP ...
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... VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range AD9244BST-65 –40°C to +85°C AD9244BSTRL-65 –40°C to +85°C 1 AD9244BSTZ-65 –40°C to +85°C 1 AD9244BSTZRL-65 –40°C to +85°C AD9244BST-40 –40°C to +85°C AD9244BSTRL-40 –40°C to +85°C 1 AD9244BSTZ-40 – ...