MAX1183ECM+D Maxim Integrated Products, MAX1183ECM+D Datasheet - Page 15
![IC ADC 10BIT 40MSPS DUAL 48-TQFP](/photos/6/61/66159/48-tqfp_21-0065g_sml.jpg)
MAX1183ECM+D
Manufacturer Part Number
MAX1183ECM+D
Description
IC ADC 10BIT 40MSPS DUAL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX1183ECMD.pdf
(18 pages)
Specifications of MAX1183ECM+D
Number Of Bits
10
Sampling Rate (per Second)
40M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
180mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Conversion Rate
40 MSPs
Resolution
10 bit
Snr
59.6 dB
Voltage Reference
2.048 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Power Dissipation
2430 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 6. Transformer-Coupled Input Drive
component is 90 degree phase-shifted with respect to
the in-phase component. At the receiver, the QAM signal
is divided down into its I and Q components, essentially
representing the modulation process reversed. Figure 8
displays the demodulation process performed in the
analog domain, using the dual matched 3V, 10-bit ADC
(MAX1183), and the MAX2451 quadrature demodulator
to recover and digitize the I and Q baseband signals.
Before being digitized by the MAX1183, the mixed-down
signal components may be filtered by matched analog
filters, such as Nyquist or pulse-shaping filters, which
remove any unwanted images from the mixing process,
thereby enhancing the overall signal-to-noise (SNR) per-
formance and minimizing intersymbol interference.
V
V
IN
IN
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
0.1µF
0.1µF
N.C.
N.C.
MINICIRCUITS
MINICIRCUITS
3
3
1
2
1
2
TT1–6
TT1–6
T1
T1
5
4
5
4
6
6
______________________________________________________________________________________
Internal Reference and Parallel Outputs
2.2µF
2.2µF
25Ω
25Ω
25Ω
25Ω
0.1µF
0.1µF
22pF
22pF
22pF
22pF
INA+
COM
INA-
INB+
INB-
MAX1183
The MAX1183 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass V
two parallel 0.1µF ceramic capacitors and a 2.2µF
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OV
boards with separated ground and power planes pro-
duce the highest level of signal integrity. Consider the
use of a split ground plane arranged to match the
physical location of the analog ground (GND) and the
digital output driver ground (OGND) on the ADC’s
package. The two ground planes should be joined at a
single point such that the noisy digital ground currents
do not interfere with the analog ground plane. The ideal
location of this connection can be determined experi-
mentally at a point along the gap between the two
ground planes, which produces optimum results. Make
this connection with a low-value, surface-mount resistor
Figure 7. Using an Op Amp for Single-Ended, AC-Coupled
Input Drive
V
V
IN
IN
MAX4108
MAX4108
100Ω
100Ω
100Ω
100Ω
Grounding, Bypassing, and
0.1µF
0.1µF
REFN
REFN
REFP
REFP
DD
1kΩ
1kΩ
1kΩ
1kΩ
, REFP, REFN, and COM with
0.1µF
0.1µF
R
50Ω
R
50Ω
ISO
ISO
DD
) to OGND. Multilayer
Board Layout
22pF
22pF
R
50Ω
50Ω
C
22pF
C
C
22pF
R
C
ISO
IN
IN
IN
ISO
IN
INA+
COM
INA-
INB+
INB-
MAX1183
15