KAD5512P-21Q72 Intersil, KAD5512P-21Q72 Datasheet - Page 3
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KAD5512P-21Q72
Manufacturer Part Number
KAD5512P-21Q72
Description
IC ADC 12BIT 210MSPS SGL 72-QFN
Manufacturer
Intersil
Series
FemtoCharge™r
Datasheet
1.KAD5512P-25Q72.pdf
(36 pages)
Specifications of KAD5512P-21Q72
Number Of Bits
12
Sampling Rate (per Second)
210M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
271mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
72-VFQFN Exposed Pad
For Use With
KDC5512EVAL - DAUGHTER CARD FOR KAD5512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Pin Descriptions - 72 Ld QFN
1, 6, 12, 19, 24,
2-5, 13, 14, 17,
PIN NUMBER
26, 45, 55, 65
7, 8, 11, 72
27, 36, 56
18, 28-31
20, 21
9, 10
71
15
16
22
23
25
32
33
34
35
37
38
39
40
41
42
43
44
46
47
48
49
LVDS [LVCMOS] NAME
CLKP, CLKN
VINN, VINP
3
OUTMODE
[CLKOUT]
CLKOUTN
CLKOUTP
RESETN
CLKDIV
NAPSLP
RLVDS
OVDD
AVDD
AVSS
OVSS
[NC]
[D0]
[NC]
[D1]
[NC]
[D2]
[NC]
[D3]
[NC]
[D4]
[NC]
[D5]
[NC]
[NC]
DNC
VCM
D0N
D1N
D2N
D3N
D4N
D5N
D6N
D0P
D1P
D2P
D3P
D4P
D5P
1.8V Analog Supply
Do Not Connect
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Tri-Level Clock Divider Control
Clock Input True, Complement
Tri-Level Output Mode Control (LVDS, LVCMOS)
Tri-Level Power Control (Nap, Sleep modes)
Power On Reset (Active Low, see page 19)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement
[NC in LVCMOS]
LVDS Bit 0 (LSB) Output True
[LVCMOS Bit 0]
LVDS Bit 1 Output Complement
[NC in LVCMOS]
LVDS Bit 1 Output True
[LVCMOS Bit 1]
LVDS Bit 2 Output Complement
[NC in LVCMOS]
LVDS Bit 2 Output True
[LVCMOS Bit 2]
LVDS Bit 3 Output Complement
[NC in LVCMOS]
LVDS Bit 3 Output True
[LVCMOS Bit 3]
LVDS Bit 4 Output Complement
[NC in LVCMOS]
LVDS Bit 4 Output True
[LVCMOS Bit 4]
LVDS Bit 5 Output Complement
[NC in LVCMOS]
LVDS Bit 5 Output True
[LVCMOS Bit 5]
LVDS Bias Resistor
(Connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement
[NC in LVCMOS]
LVDS Clock Output True
[LVCMOS CLKOUT]
LVDS Bit 6 Output Complement
[NC in LVCMOS]
KAD5512P
[LVCMOS] FUNCTION SDR MODE
LVDS
DDR MODE COMMENTS
DDR Logical Bits 1, 0
(LVDS)
DDR Logical Bits 1, 0
(LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 3,2
(LVDS)
DDR Logical Bits 3,2
(LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 5,4
(LVDS)
DDR Logical Bits 5,4
(LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 7,6
(LVDS)
October 1, 2010
FN6807.4