MAX107ECS+ Maxim Integrated Products, MAX107ECS+ Datasheet - Page 11
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MAX107ECS+
Manufacturer Part Number
MAX107ECS+
Description
IC ADC 6BIT 400MSPS DL 80-TQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX107ECS.pdf
(21 pages)
Specifications of MAX107ECS+
Number Of Bits
6
Sampling Rate (per Second)
400M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
2.6W
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX107 is a dual, +5V, 6-bit, 400Msps flash ana-
log-to-digital converter (ADC), designed for high-speed,
high bandwidth I&Q digitizing. Each ADC (Figure 1)
employs a fully differential, wide bandwidth input stage,
6-bit quantizers and a unique encoding scheme to limit
metastable states to typically one error per 10
cycles, with no error exceeding a maximum of 1LSB. An
integrated 6:12 output demultiplexer simplifies interfac-
ing to the part by reducing the output data rate to one-
half the sampling clock rate. The MAX107 outputs data
in LVDS two’s complement format.
When clocked at 400Msps, the MAX107 provides a typ-
ical signal-to-noise plus distortion (SINAD) of 36.7dB
with a 125MHz input tone. The analog input of the
MAX107 is designed for differential or single-ended use
with a ±400mV full-scale input range. In addition, the
MAX107 features an on-board +2.5V precision
65, 72
66, 71
PIN
62
63
64
67
68
69
70
73
74
75
76
77
78
79
80
OGNDI
NAME
OV
A2I+
A3I+
A4I+
A5I+
P2I+
P3I+
P4I+
P5I+
A2I-
P3I-
A3I-
P4I-
A4I-
P5I-
A5I-
______________________________________________________________________________________
CC
Dual, 6-Bit, 400Msps ADC with On-Chip,
I
Detailed Description
Primary Output Data Bit 2, I-Channel
Complementary Auxiliary Output Data Bit 2, I-Channel
Auxiliary Output Data Bit 2, I-Channel
I-Channel Outputs, Digital Supply. Supplies I-channel output drivers and DREADY circuit. Bypass to
OGND with 0.01µF in parallel with 47pF for proper operation.
I-Channel Outputs, Digital Ground. Connect to designated digital ground (OGND) on PC board
for proper operation.
Complementary Primary Output Data Bit 3, I-Channel
Primary Output Data Bit 3, I-Channel
Complementary Auxiliary Output Data Bit 3, I-Channel
Auxiliary Output Data Bit 3, I-Channel
Complementary Primary Output Data Bit 4, I-Channel
Primary Output Data Bit 4, I-Channel
Complementary Auxiliary Output Data Bit 4, I-Channel
Auxiliary Output Data Bit 4, I-Channel
Complementary Primary Output Data Bit 5, I-Channel
Primary Output Data Bit 5, I-Channel
Complementary Auxiliary Output Data Bit 5, I-Channel
Auxiliary Output Data Bit 5, I-Channel
16
clock
Wideband Input Amplifier
bandgap reference, which is scaled to meet the analog
input full-scale range.
The MAX107 employs a flash or parallel architecture.
The key to this high-speed flash architecture is the use
of an innovative, high-performance comparator design.
Each quantizer and downstream logic translates the
comparator outputs into 6-bit, parallel codes in two’s
complement format and passes them on to the internal
6:12 demultiplexer. The demultiplexer enables the
ADCs to provide their output data at half the sampling
speed on primary and auxiliary ports. LVDS data is
available at speeds of up to 200MHz per output port.
As with all ADCs, if the input waveform is changing
rapidly during conversion, effective number of bits
(ENOB), signal-to-noise plus distortion (SINAD), and
signal-to-noise ratio (SNR) specifications will degrade.
The MAX107’s on-board, wide-bandwidth input ampli-
FUNCTION
Pin Description (continued)
Input Amplifier Circuits
Principle of Operation
11