MAX107ECS+ Maxim Integrated Products, MAX107ECS+ Datasheet - Page 15
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MAX107ECS+
Manufacturer Part Number
MAX107ECS+
Description
IC ADC 6BIT 400MSPS DL 80-TQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX107ECS.pdf
(21 pages)
Specifications of MAX107ECS+
Number Of Bits
6
Sampling Rate (per Second)
400M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
2.6W
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 7. Output Timing Relationship Between CLK and DREADY Signals and Primary/Auxiliary Output Ports
edge of the data ready clock. The auxiliary data port
always contains the older sample. The primary output
always contains the most recent data sample, regard-
less of the DREADY clock phase.
timing and data alignment of the auxiliary and primary
output ports in relationship with the CLK and DREADY
signals. Data in the primary port is delayed by five
clock cycles while data in the auxiliary port is delayed
by six clock cycles.
Quadrature amplitude modulation (QAM) is frequently
used in digital communication systems to increase
channel capacity. A QAM signal is modulated in both
DATA PORT
DATA PORT
AUXILIARY
DREADY+
PRIMARY
DREADY-
DREADY
NOTE: THE LATENCY TO THE PRIMARY PORT IS FIVE CLOCK CYCLES, THE LATENCY TO THE AUXILIARY PORT IS SIX CLOCK
CLK+
CLK-
CLK
CYCLES. BOTH PRIMARY AND AUXILIARY DATA PORTS ARE UPDATED ON THE RISING EDGE OF THE DREADY+ CLOCK.
N
______________________________________________________________________________________
ADC SAMPLE
N+1
Dual, 6-Bit, 400Msps ADC with On-Chip,
N+2
Typical I/Q Application
N+3
N+4
Figure 7 shows the
AUXILIARY PORT DATA
PRIMARY PORT DATA
MAX107 ADCs SAMPLE ON THE RISING EDGE OF CLK+
N+5
N+6
CLK-
CLK+
t
PWH
N+7
N+1
N
N+8
Wideband Input Amplifier
N+9
N+2
N+3
t
PD1
t
PD2
amplitude and phase. With a demodulator, this QAM
signal gets downconverted and separated in its in-
phase (I) and quadrature (Q) components. Both I&Q
channels are digitized by an ADC at the baseband
level in order to recover the transmitted information.
Figure 8 shows a typical application circuit to directly
tune L-band signals to baseband, incorporating a
direct conversion tuner (MAX2108) and the MAX107 to
digitize I&Q channels with excellent phase- and gain-
matching. A front-end L-C filter is required for anti-alias-
ing purposes.
N+10 N+11
t
PWL
N+4
N+5
N+12
DREADY -
DREADY +
N+13
N+6
N+7
N+14
N+8
N+9
N+15
N+16 N+17 N+18
N+10
N+11
N+19
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